MCL F 144 Search Results

Contextual Info: SONY ΣRAM CXK79M36C163GB / CXK79M18C163GB 18Mb 1x2Lp LVCMOS High Speed Synchronous SRAMs 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M36C163GB (organized as 524,288 words by 36 bits) and the CXK79M18C163GB (organized as 1,048,576 words

Contextual Info: SONY ΣRAM CXK79M36C162GB / CXK79M18C162GB 18Mb 1x2Lp HSTL High Speed Synchronous SRAMs 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M36C162GB (organized as 524,288 words by 36 bits) and the CXK79M18C162GB (organized as 1,048,576 words

a7w29

Abstract: CXK79M36C163GB-33 CXK79M36C163GB-4 CXK79M36C163GB-5 CXK79M18C163GB CXK79M18C163GB-33 CXK79M18C163GB-4 CXK79M18C163GB-5 CXK79M36C163GB
Contextual Info: SONY ΣRAM CXK79M36C163GB / CXK79M18C163GB 18Mb 1x2Lp LVCMOS High Speed Synchronous SRAMs 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M36C163GB (organized as 524,288 words by 36 bits) and the CXK79M18C163GB (organized as 1,048,576 words

2U 73 diode

Abstract: CXK79M18C165GB CXK79M36C165GB CXK79M36C165GB-33 CXK79M36C165GB-4 CXK79M72C165GB CXK79M72C165GB-33 CXK79M72C165GB-4 CXK79M72C165GB-5
Contextual Info: SONY ΣRAM CXK79M72C165GB CXK79M36C165GB CXK79M18C165GB 18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C165GB (organized as 262,144 words by 72 bits), CXK79M36C165GB (organized as 524,288 words by 36

Contextual Info: SONY ΣRAM CXK79M72C161GB CXK79M36C161GB CXK79M18C161GB 18Mb 1x1Lp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C161GB (organized as 262,144 words by 72 bits), CXK79M36C161GB (organized as 524,288 words by 36

Contextual Info: SONY ΣRAM CXK79M72C160GB CXK79M36C160GB CXK79M18C160GB 18Mb 1x1Lp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C160GB (organized as 262,144 words by 72 bits), CXK79M36C160GB (organized as 524,288 words by 36

CXK79M18C164GB

Abstract: CXK79M36C164GB CXK79M36C164GB-33 CXK79M36C164GB-4 CXK79M72C164GB CXK79M72C164GB-33 CXK79M72C164GB-4 CXK79M72C164GB-5
Contextual Info: SONY ΣRAM CXK79M72C164GB CXK79M36C164GB CXK79M18C164GB 18Mb 1x1Dp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C164GB (organized as 262,144 words by 72 bits), CXK79M36C164GB (organized as 524,288 words by 36

CXK79M36C163GB

Abstract: CXK79M36C163GB-33 CXK79M36C163GB-4 CXK79M36C163GB-5
Contextual Info: SONY ΣRAM CXK79M36C163GB 18Mb 1x2Lp LVCMOS High Speed Synchronous SRAMs 512Kb x 36 33/4/5 Preliminary Description The CXK79M36C163GB is a high speed CMOS synchronous static RAM with common I/O pins. It is manufactured in compliance with the JEDEC-standard 209 pin BGA package pinout defined for SigmaRAM™ devices. It integrates input registers,

CXK79M18C162GB

Abstract: CXK79M18C162GB-33 CXK79M18C162GB-4 CXK79M18C162GB-5 CXK79M36C162GB CXK79M36C162GB-33 CXK79M36C162GB-4 CXK79M36C162GB-5 AA119
Contextual Info: SONY ΣRAM CXK79M36C162GB / CXK79M18C162GB 18Mb 1x2Lp HSTL High Speed Synchronous SRAMs 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M36C162GB (organized as 524,288 words by 36 bits) and the CXK79M18C162GB (organized as 1,048,576 words

CXK79M72C165GB-4

Abstract: CXK79M36C165GB CXK79M36C165GB-3 CXK79M36C165GB-33 CXK79M72C165GB CXK79M72C165GB-3 CXK79M72C165GB-33
Contextual Info: SONY ΣRAM CXK79M72C165GB / CXK79M36C165GB 18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 3/33/4 Preliminary Description The CXK79M72C165GB (organized as 262,144 words by 72 bits) and the CXK79M36C165GB (organized as 524,288 words

CXK79M36C162GB

Abstract: CXK79M36C162GB-33 CXK79M36C162GB-4 CXK79M36C162GB-5
Contextual Info: SONY ΣRAM CXK79M36C162GB 18Mb 1x2Lp HSTL High Speed Synchronous SRAMs 512Kb x 36 33/4/5 Preliminary Description The CXK79M36C162GB is a high speed CMOS synchronous static RAM with common I/O pins. It is manufactured in compliance with the JEDEC-standard 209 pin BGA package pinout defined for SigmaRAM™ devices. It integrates input registers,

CXK79M36C160GB

Abstract: CXK79M36C160GB-33 CXK79M36C160GB-4 CXK79M36C160GB-5 CXK79M72C160GB CXK79M72C160GB-33 CXK79M72C160GB-4 CXK79M72C160GB-5
Contextual Info: SONY ΣRAM CXK79M72C160GB / CXK79M36C160GB 18Mb 1x1Lp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 33/4/5 Preliminary Description The CXK79M72C160GB (organized as 262,144 words by 72 bits) and the CXK79M36C160GB (organized as 524,288 words

CXK79M36C165GB

Abstract: CXK79M36C165GB-33 CXK79M36C165GB-4 CXK79M36C165GB-5 CXK79M72C165GB CXK79M72C165GB-33 CXK79M72C165GB-4 CXK79M72C165GB-5
Contextual Info: SONY ΣRAM CXK79M72C165GB / CXK79M36C165GB 18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 33/4/5 Preliminary Description The CXK79M72C165GB (organized as 262,144 words by 72 bits) and the CXK79M36C165GB (organized as 524,288 words

CXK79M36C164GB

Abstract: CXK79M36C164GB-33 CXK79M36C164GB-4 CXK79M36C164GB-5 CXK79M72C164GB CXK79M72C164GB-33 CXK79M72C164GB-4 CXK79M72C164GB-5
Contextual Info: SONY ΣRAM CXK79M72C164GB / CXK79M36C164GB 18Mb 1x1Dp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 33/4/5 Preliminary Description The CXK79M72C164GB (organized as 262,144 words by 72 bits) and the CXK79M36C164GB (organized as 524,288 words

A7W17

Abstract: CXK79M18C161GB CXK79M36C161GB CXK79M36C161GB-33 CXK79M36C161GB-4 CXK79M72C161GB CXK79M72C161GB-4 CXK79M72C161GB-5 1K x 8 static ram IDD24
Contextual Info: SONY ΣRAM CXK79M72C161GB CXK79M36C161GB CXK79M18C161GB 18Mb 1x1Lp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C161GB (organized as 262,144 words by 72 bits), CXK79M36C161GB (organized as 524,288 words by 36

CXK79M72C164GB-33

Abstract: CXK79M18C164GB CXK79M36C164GB CXK79M36C164GB-33 CXK79M36C164GB-4 CXK79M72C164GB CXK79M72C164GB-4 CXK79M72C164GB-5
Contextual Info: SONY ΣRAM CXK79M72C164GB CXK79M36C164GB CXK79M18C164GB 18Mb 1x1Dp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C164GB (organized as 262,144 words by 72 bits), CXK79M36C164GB (organized as 524,288 words by 36

CXK79M18C165GB

Abstract: CXK79M36C165GB CXK79M36C165GB-33 CXK79M36C165GB-4 CXK79M72C165GB CXK79M72C165GB-33 CXK79M72C165GB-4 CXK79M72C165GB-5
Contextual Info: SONY ΣRAM CXK79M72C165GB CXK79M36C165GB CXK79M18C165GB 18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C165GB (organized as 262,144 words by 72 bits), CXK79M36C165GB (organized as 524,288 words by 36

A7W17

Abstract: CXK79M18C160GB CXK79M36C160GB CXK79M36C160GB-33 CXK79M36C160GB-4 CXK79M72C160GB CXK79M72C160GB-33 CXK79M72C160GB-4 CXK79M72C160GB-5 2a 105
Contextual Info: SONY ΣRAM CXK79M72C160GB CXK79M36C160GB CXK79M18C160GB 18Mb 1x1Lp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 or 1Mb x 18 33/4/5 Preliminary Description The CXK79M72C160GB (organized as 262,144 words by 72 bits), CXK79M36C160GB (organized as 524,288 words by 36

CXK79M72C164GB-28

Abstract: CXK79M72C164GB-33 CXK79M36C164GB CXK79M72C164GB CXK79M72C164GB-3 BGA209
Contextual Info: SONY ΣRAM CXK79M72C164GB / CXK79M36C164GB 28/3/33/4 18Mb 1x1Dp HSTL High Speed Synchronous SRAMs 256Kb x 72 or 512Kb x 36 Preliminary Description The CXK79M72C164GB (organized as 262,144 words by 72 bits) and the CXK79M36C164GB (organized as 524,288 words

ECHO schematic diagrams

Contextual Info: Preliminary GS8170LW18/36/72C-333/300/250 18Mb Σ1x1 Late Write SigmaRAM SRAM 209-Bump BGA Commercial Temp Industrial Temp 250 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Late Write mode • Pipeline read operation • JEDEC-standard SigmaRAM™ pinout and package

U8 100E

Abstract: BGA2002 ECHO schematic diagrams GS8170DD36C-300 GS8170DD36C-333
Contextual Info: Preliminary GS8170DD18/36C-333/300/250 18Mb Σ1x2Lp Double Data Rate SigmaRAM SRAM 209-Bump BGA Commercial Temp Industrial Temp 250 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Double Data Rate Read and Write mode • JEDEC-standard SigmaRAM™ pinout and package

ECHO schematic diagrams

Abstract: flip chip bga 0,8 mm
Contextual Info: Preliminary GS8170DW18/36/72C-333/300/250 18Mb Σ1x1 Double Late Write SigmaRAM SRAM 209-Bump BGA Commercial Temp Industrial Temp 250 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Double Late Write mode • JEDEC-standard SigmaRAM™ pinout and package

ECHO schematic diagrams

Abstract: GS8170DD36 GS8170DD36C-250 GS8170DD36C-300 GS8170DD36C-300I GS8170DD36C-333 GS8170DD36C-333I
Contextual Info: GS8170DD36C-333/300/250/200 209-Bump BGA Commercial Temp Industrial Temp 18Mb Σ1x2Lp CMOS I/O Double Data Rate SigmaRAM Features • Double Data Rate Read and Write mode • Late Write; Pipelined read operation • JEDEC-standard SigmaRAM™ pinout and package

PL-012

Abstract: ROS-1000PV
Contextual Info: ROS-1000PV+ ROS-1000PV Surface Mount Voltage Controlled Oscillator 5V Tuning for PLL IC’s 900 to 1000 MHz Features • low phase noise, -144 dBc/Hz at 1 MHz, typ. • linear tuning, 27-38 MHz/V typ. • aqueous washable CASE STYLE: CK605 PRICE: $19.95 ea. QTY 5-49