MASTER SSC 1 Search Results

Super10

Abstract: UDE RD1 ST10 SXM 08 rbps2 SXLB
Contextual Info: Super10 STANDARD PERIPHERAL USER’S MANUAL Release 1.2 June 2004 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Super10 STANDARD PERIPHERAL USER’S MANUAL PREFACE By introducing the ST10 family member Super10, STMicroelectronics is expanding its offer on strategic

eeprom programmer schematic easy design universal

Abstract: eeprom programmer schematic diagram spi flash programmer schematic infineon XE166 spi eeprom flash programmer schematic memtool 0x8408 memtool c166 family AP16095 M25P80
Contextual Info: Application Note, V1.0, October 2007 AP16128 XE166 Family Programming the on-chip Flash using the SSC Bootstrap Loader Microcontrollers Edition 2007-10 Published by Infineon Technologies AG 81726 Munich, Germany 2007 Infineon Technologies AG. All Rights Reserved.

BA-STEP

Abstract: C166 C167 SAF-C165-LF C165 C165-LF C165-LM
Contextual Info: SIEMENS Microcomputer Components Technical Support Group Munich HL MCB PD/AT 2 Errata Sheet September 29, 1995 / Release 1.0 Device : Stepping Code / Marking : SAF-C165-LF ES3-CA This errata sheet describes the functional problems known in these steps. Problem classification and numbering is performed relative to modules. Since the

marking VBZ

Contextual Info: 19-3683; Rev 0; 5/05 Multiple-Output Clock Generator with Spread Spectrum The MAX9492 frequency synthesizer is designed to generate multiple clocks for clock distribution in network routers or switches. The device provides a total of six buffered clock outputs CLK1 to CLK6 . CLK1 is the

transistor p14

Contextual Info: On-Chip Peripheral Units 6 On-Chip Peripheral Components 6.1 Parallel I/O The SAB-C511/513 has four 8-bit I/O ports. Port 0 is an open-drain bidirectional I/O port, while ports 1 to 3 are quasi-bidirectional I/O ports with internal pullup resistors. That means, when

48MHZ

Abstract: RS480
Contextual Info: IDTCV137 PROGRAMMABLE FLEXPC CLOCK FOR AMD K8 PROCESSOR ATI RS480 COMMERCIAL TEMPERATURE RANGE IDTCV137 PROGRAMMABLE FLEXPC™ CLOCK FOR AMD K8 PROCESSOR ATI RS480 FEATURES: DESCRIPTION: • One high precision N and SSC programmable PLL for CPU • One high precision N and SSC programmable PLL for SRC[2:1]

SMD transistor 6c

Abstract: siemens ecu marking code B9 DG SMD Transistor nat4 smd CHN 842 marking BARX A23i as3 SMD Transistor CHN 841 marking code E3 SMD ic
Contextual Info: S IE M E N S ICs for Communications Multichannel Extensions MUNICH32X Network Interface Controller for HDLC with PEB 20321 Version 1.1 Preliminary Data Sheet 10.96 T 20 32 -1 V 11 -D1 -7600 This Material Copyrighted By Its Respective Manufacturer Edition 10.96

UPS SIEMENS

Abstract: SMD IC MARKING GP a1s smd AD211 as3 SMD Transistor siemens sab 82532 transistor SMD MARKING CODE nx smd transistor marking a2h smd marking ARB b32 siemens
Contextual Info: S IE M E N S ICs for Communications Multichannel Network Interface Controller for HDLC with Extensions MUNICH32X PEB 20321 Version 2.1 Preliminary Data Sheet 01.98 DS 1 This Material Copyrighted By Its Respective Manufacturer Edition 1998-01-23 This edition was realized using the software

transistor SMD t06

Abstract: transistor SMD t06 19 transistor SMD t06 47 K TRANSISTOR SMD MARKING CODE T04 TRANSISTOR SMD MARKING CODE t05 smd TRANSISTOR code marking T04 TRANSISTOR SMD MARKING CODE t09 SMD Transistor t06 97 SMD Transistor t06 94 transistor SMD t06 76
Contextual Info: D at a S h e e t , D S 1 , M ay 2 00 0 DSCC4 DMA Supported Serial Communication Controller with 4 Channels PEB 20534 Version 2.1 PEF 20534 Version 2.1 Datacom N e v e r s t o p t h i n k i n g . PEB 20534 PEF 20534 Revision History: Current Version: 2000-05-30

ISO26262

Abstract: IEC61508 Gmr sensor marking exxxx TLE5012-E0318
Contextual Info: Angle Sensor GMR-Based Angular Sensor for Rotor-Position Sensing TLE5012 TLE5012-E0318 TLE5012-E0742 Data Sheet V 1.0, 2010-11 Final Sensors Edition 2010-11 Published by Infineon Technologies AG 81726 Munich, Germany 2011 Infineon Technologies AG All Rights Reserved.

Contextual Info: On-Chip Peripheral Units 6.4 Synchronous Serial Channel SSC The SAB-C511/513 microcontrollers provide a Synchronous Serial Channel unit, the SSC. This interface is compatible to the popular SPI serial bus interface. It can be used for simple I/O expansion via shift registers, for connection of a variety of peripheral components, such as A/D

master ssc 1

Abstract: A166 C161 C161O C166 C16X L166
Contextual Info: Microcontrollers ApNote AP164901 or æ additional file AP164901.EXE available Emulating a synchronous serial interface SSC interface via software routines Abstract: The solution presented in this paper and in the attached source files emulates the most

CS5571

Abstract: CS5571-ISZ LSB16 MO-150
Contextual Info: 6/25/07 14:12 CS5571 ±2.5 V / 5 V, 100 kSps, 16-bit, High-throughput ∆Σ ADC Features & Description General Description ‰ Single-ended Analog Input The CS5571 is a single-channel, 16-bit analog-to-digital converter capable of 100 kSps conversion rate. The input

siemens C166 instruction set

Abstract: SAB-C165-L25M C165 SAB-C165-LM SAB-C165-LM3V SAF-C165-L25M SAF-C165-LM SAF-C165-LM3V CPU21
Contextual Info: Microcontroller Components Errata Sheet March 30, 2001 / Release 1.0 Device: Stepping Code / Marking: Package: SAB-C165-LM, -LF SAF-C165-LM, -LF SAB-C165-L25M, -L25F SAF-C165-L25M, -L25F SAB-C165-LM3V, -LF3V SAF-C165-LM3V, -LF3V ES-HA, HA P-MQFP-100, P-TQFP-100

marking AF

Abstract: C166 C167 C167CR SAH-C167CW-L16M c167cw-l16
Contextual Info: Microcomputer Components Technical Support Group Munich HL MCB AT 1 Errata Sheet December 18, 1995 / Release 1.0 Device : Stepping Code / Marking : SAH-C167CW-L16M AE, AF This errata sheet describes the functional problems and deviations from the DC/AC specification known in this step. For backward reference, a table which

smd transistor cy 813

Abstract: transistor NEC D 882 p circuit diagram CSS102A
Contextual Info: C S 5101A a m a m m r im C S 5102A m mmm* Semiconductor Corporation 16-Bit, 100 kHz/20 kHz A/D Converters Features General Description • Monolithic CMOS A/D Converters Inherent Sampling Architecture 2-Channel Input Multiplexer Flexible Serial Output Port

AT91SAM7S32

Abstract: AT91SAM7S32-AU-001 PA17 PA18 PA19 PA20 15Two-wire
Contextual Info: Errata • Universal Synchronous Asynchronous Receiver Transmitter USART – Hardware Handshake (21) • Serial Peripheral Interface (SPI) • • • • • • • • • – Pulse Generation on SPCK (20) – MCK/32 Clock Selection (19) Parallel Input/Output Controller (PIO)

74hc595 equivalent

Abstract: CS5102A cdb5101a CS5101A-JP8 CS5101A CS5101A-BP8 MetraByte
Contextual Info: CS5101A CS5102A 16-Bit, 100 kHz / 20 kHz A/D Converters Features Description l Monolithic CMOS A/D Converters The CS5101A and CS5102A are 16-bit monolithic CMOS analog-to-digital converters capable of 100 kHz 5101A and 20 kHz (5102A) throughput. The CS5102A’s low power consumption of 44 mW, coupled

AT91SAM7S128

Abstract: PA31 ATMEl 326 AT91SAM7S128-AU-001 PA17 PA20 PA21
Contextual Info: Errata • Serial Peripheral Interface SPI – MCK/32 Clock Selection (20) • Parallel Input/Output Controller (PIO) • • • • • • • • • – Leakage on PA17 - PA20 (19) – Electrical Characteristics on NRST and PAO (18) – Drive Low NRST, PA0-PA16 and PA21 - PA31 (17)

PEF 7071

Abstract: C166CBC siemens microprocessor c161 C161U siemens b 58 295 bd intel 80 C161 C165 C166 FE4A V24-interface
Contextual Info: L IA T N E ID F N ICs for Communications O Embedded C166 with USB, IOM-2 Interface and HDLC Support C165 UTAH/C161U Version 1.0 C Last modified 12/14/98 Target Specification 12.98 DS 1 C165 UTAH/C161 U CONFIDENTIAL Revision History: Current Version: Version 1.0

circuit diagram Avr sd card reader

Abstract: 5001 avr CTBGA196 37 PIN TFT MOBILE DISPLAY 8K AT32AP7002-CTUR atmel 928 lcd mono to vga interface 24 pin stn lcd pinout details AT32AP7002 mark atmel 532
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

AT91SAM7S512

Abstract: K 2611 MOSFET equal 40178 401068 Atmel AT24LC512 EEPROM AT91SAM7S-EK AT91SAM7S256 Atmel 0342 AT91SAM7S128 AT91SAM7S64
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support

AT91SAM9260B-CU

Abstract: AT91SAM9260B-QU application note SAM9260
Contextual Info: Features • 180 MHz ARM926EJ-S ARM Thumb® Processor – 8 KBytes Data Cache, 8 KBytes Instruction Cache, MMU • Memories • • • • – 32-bit External Bus Interface supporting 4-bank SDRAM/LPSDR, Static Memories, CompactFlash, SLC NAND Flash with ECC

thumb instructions for stepper motor interfacing

Abstract: Cortex A9 instruction set ATSAM3S8BA-MU 0x28AB0A60 11090AS cortex a15 core QFN64 9x9 ATmel cortex a9 microcontroller ARM cortex a15 cpu sdhc sam
Contextual Info: Features • Core • • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 64 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Pin-to-pin compatible with AT91SAM7S legacy products (64-pin versions), SAM3S4/2/1 products