MARKING JK 1 Search Results

KRA730E

Contextual Info: SEMICONDUCTOR KRA730E MARKING SPECIFICATION TES6 PACKAGE 1. Marking method Laser Marking JK 1 3 No. 0 1 2. Marking 2 Item Marking Description Device Mark JK KRA730E hFE Grade - - * Lot No. 01 2006. 1st Week [0:1st Character, 1:2nd Character] Pin No. Dot Pin 1 Index.

KRA730U

Abstract: marking jk 1
Contextual Info: SEMICONDUCTOR KRA730U MARKING SPECIFICATION US6 PACKAGE 1. Marking method Laser Marking JK 1 3 No. 0 1 2. Marking 2 Item Marking Description Device Mark JK KRA730U hFE Grade - - * Lot No. 01 2006. 1st Week [0:1st Character, 1:2nd Character] Pin No. Dot Pin 1 Index.

A-132

Abstract: ERD38 marking AJ 7
Contextual Info: ERD38 i .5A S ± 'J ' « a * * * - K K • i'f-JK'+ii : Outline Drawings FAST RECOVERY -N- *1.2 t 30 min 7.5 30min : Features • * - r - j + 's 'f ■ K jk • Marking S up er high speed sw itching • 9 n 5- 3 - K : È Low V F in turn on Color code : W hire

Contextual Info: %-n B JK & REV. EZEfrO IPS 'ON 9 N I MV Ü Q ALIGNMENT MARKING(RED) DATE N 0 T E 3 N 0 T E 2 DON W. H ñ & DESCRIPTION NO. 26.J an.2007 062114 REVISED 14. May . 2 0 0 7 062960 REVISED FORM T IT LE M a DR. eto. APPD. APPD. CHK. N.SASANO E.MATSUMOTO f i , / fr e m ii,A

MMM168

Contextual Info: FIXED ATTENUATORS Mini-Circuits 50 Ω Surface Mount 1/2W MINIATURE 1 to 30 dB, DC to 2500 MHz LAT MODELu u NO. FREQ. RANGE MHz ATTENUATION dB VSWR :1 Max. MAX. INPUT POWER, W 25°C FLATNESS, Max. fL-f U Nom. L LAT-1 LAT-2 LAT-3 LAT-4 DC-2500 DC-2500

MMM168

Contextual Info: POWER SPLITTERS/COMBINERS 24 WAY-0° 50 & 75Ω 48 WAY-0° 10 to 300 MHz 200 kHz to 200 MHz ZFSC-24 FREQ. RANGE MHz MODEL NO. ZFSC-48 ISOLATION dB INSERTION LOSS, dB 24 WAY above 13.8dB 48 WAY (above 16.8dB) U M (see RF/IF Designer handbook) U Page Max.

SN74LS73AP

Contextual Info: SN5473, SN54LS73A, SN7473, SN74LS73A DUAL J-K FLIP-FLOPS WITH CLEAR SDLS118 – DECEMBER 1983 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

marking code 2

Abstract: MMM168
Contextual Info: Mini-Circuits 50 Q_ Surface Mount 1/2W M iniature l to 30 dB, DC to 2500 MHz LAT MODEL* NO. FR EQ . ATTENUATION RANGE MHz dB '• - H VSWR :1> Max. MAX. INPUT POWER, W 2 5 °C FLATNESS, Max. '• Norn. ■ -■. % I 1 u y V CASE STYLE P R IC E

Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial & Automotive Grade) Overview KEMET’s high voltage surface mount MLCCs in C0G dielectric feature a 125°C maximum operating temperature and are

Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial & Automotive Grade) Overview KEMET’s high voltage surface mount MLCCs in C0G dielectric feature a 125°C maximum operating temperature and are

Contextual Info: SN54ALS112A, SN74ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS199A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation

Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

OF928

Contextual Info: SN5476, SN54LS76A SN7476, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR SDLS121 – DECEMBER 1983 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS198B – APRIL 1982 – REVISED AUGUST 1995 • SN54ALS109A, SN54AS109A . . . J PACKAGE SN74ALS109A, SN74AS109A . . . D OR N PACKAGE TOP VIEW

Contextual Info: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V

AC109

Abstract: CD54AC109 CD54AC109F3A CD74AC109 CD74AC109E CD74AC109M96
Contextual Info: CD54AC109, CD74AC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS326 – JANUARY 2003 D D D D D D CD54AC109 . . . F PACKAGE CD74AC109 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs High Voltage with Flexible Termination System (HV FT-CAP) X7R Dielectric, 500 – 3,000 VDC (Commercial & Automotive Grade) Overview KEMET’s High Voltage with Flexible Termination (HV FT-CAP) surface mount MLCCs in X7R dielectric address the primary

cd4027b

Abstract: D4013 SB 125 024 CD4027BF3A real time application of D flip-flop
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS032C − Revised October 2003 The CD4027B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and

Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs High Voltage with Flexible Termination System (HV FT-CAP) X7R Dielectric, 500 – 3,000 VDC (Commercial & Automotive Grade) Overview KEMET’s High Voltage with Flexible Termination (HV FT-CAP) surface mount MLCCs in X7R dielectric address the primary

Contextual Info: CD54AC109, CD74AC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS326 – JANUARY 2003 D D D D D D CD54AC109 . . . F PACKAGE CD74AC109 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

Contextual Info: selos selos Marking accessories for DIN rail terminal blocks Marking plates All blocks / 5 mm wide and larger for marcom 2 marking computer for wieplot 500 plotter system Type Part No. Std. Pack 9075 A/5/10/11 Part No. Std. Pack Single marking tag, unmarked

T80-T

Contextual Info: VUO 16 Three Phase Rectifier Bridge VRSM/DSM V 900 1300 1500 1700 1900 VRRM/DRM V 800 1200 1400 1600 1800 VUO 16-08NO1 VUO 16-12NO1 VUO 16-14NO1 VUO 16-16NO1 VUO 16-18NO1 Conditions IdAV IdAV IdAVM TC = 90°C, module TA = 45°C RthKA = 0.5 K/W , module module

Contextual Info: SN54HC109, SN74HC109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS470 – MARCH 2003 D D D Wide Operating Voltage Range of 2 V to 6 V Low Input Current of 1 µA Max High-Current Outputs Drive Up To 10 LSTTL Loads 1 16 2 15 3 14 4 13

Contextual Info: CD54AC112, CD74AC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS325 – JANUARY 2003 D D D D D D CD54AC112 . . . F PACKAGE CD74AC112 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the