MAPPING 6636 Search Results

Willamette

Abstract: project transistor tester
Contextual Info: Intel Technology Journal Q1’99 Defect-Based Test: A Key Enabler for Successful Migration to Structural Test Sanjay Sengupta, MPG Test Technology, Intel Corp. Sandip Kundu, MPG Test Technology, Intel Corp. Sreejit Chakravarty, MPG Test Technology, Intel Corp.

amcc volta

Contextual Info: S4814PBI21 Volta 48 FINAL Datasheet Revision 1.13 November 21, 2005 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

Contextual Info: S4814PBI22 Volta 48 Preliminary Datasheet Revision 1.13 November 21, 2005 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

S19225PBI22

Abstract: S19225PBI AMCC Virtual Concatenation deskew SRAM SAMSUNG
Contextual Info: S19225PBI22 Volta 192 Datasheet Revision 1.14 February 23, 2006 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

SLA 7041

Abstract: amcc volta SLA 7041 ms MT46V16M16-6T AMCC Virtual Concatenation deskew 4XP4 xxaa9 S19225PBI21
Contextual Info: S19225PBI21 FINAL Volta192 Datasheet Revision 1.13 November 9, 2005 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

ssf 7509 equivalent

Abstract: lt 747B PM 8058 SMD code 307C interfacing 8279 to the 8086 mac 87A6 TA 7176 IC smd cross reference msd 702F MSD 7818 S19208CBI
Contextual Info: S19208CBI Niagara Datasheet Revision 1.11 January 16, 2003 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED AMCC Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this

TCI6636K2H

Abstract: TCI 521 Antenna log periodic mimo lte TCI6636K2K SPRS835C ARM Cortex-A15 philips FP 9400 sprugv5 TCI antenna 545 lte-a
Contextual Info: TCI6636K2H Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

Contextual Info: TCI6636K2H Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

Contextual Info: TCI6636K2H SPRS835F—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6636K2H Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

TCI6638K2K

Abstract: SPRS836A TCI 521 Antenna log periodic c66x IEEE1588v2 Ethernet switch ROHC 9451U
Contextual Info: TCI6638K2K Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

6242E

Abstract: 4583 dual schmitt trigger 6242b la 4508 ic pin diagram R1100D121C AT91Bootstrap CS 5609 ARM926EJ-S ISO7816 5609 dec
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

Contextual Info: TCI6638K2K Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer

philips FP 9400

Abstract: TCI6636K2H TCI6636K2K HSPA Module TCI antenna 545 fft code fpga TMS320TCI6636 ARM Cortex-A15 BOOTMODE15 cortex-a15
Contextual Info: TCI6636K2H Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

ATMEL 234

Abstract: how to derive sim 900 ARM926EJ-S AT91SAM ISO7816
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer

Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer

ARM Cortex A15

Abstract: TMS320TCI6636 TCI6636 Cortex A15 ARM Cortex-A15 DDR3 phy cortex-a15 SPRS835 bcp 846 Rake search accelerator
Contextual Info: TMS320TCI6636 Communications Infrastructure KeyStone II SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

HX8340B

Abstract: HX8340-B mx 362-0
Contextual Info: DATA SHEET DOC No. HX8340-B(N -DS ) HX8340-B(N) 176RGB x 220 dot, 262k color, with internal GRAM, TFT Mobile Single Chip Driver Preliminary version 01 October, 2007 HX8340-B(N) 176RGB x 220 dot, 262K color, with internal GRAM, TFT Mobile Single Chip Driver

997160

Abstract: NS 4889-00 ti la29 an 7591 7591-60 tms 1943 ti c40 architecture an 7591-60 SMJ320C40 XDS510
Contextual Info: TMP320C40KGD, SMJ320C40KGD FLOATING-POINT DIGITAL SIGNAL PROCESSORS KNOWN GOOD DIE SPRS036 – NOVEMBER 1995 D D D D D D D D D D D D Commercial Operating Temperature Range 0°C to 70°C Military Operating Temperature Range –55°C to 125°C; QML Processing

SIEMENS 3 TB 40 12 - 0A

Abstract: smd transistor 2T5 SIEMENS 3 TB 40 10 - 0A SIEMENS 3 TB 40 17 - 0A
Contextual Info: SIEMENS ISDN Subscriber Access Controller for UpN-lnterface Terminals ISAC -P TE PSB 2196 Preliminary Data 1 • • • • • • • • • • CMOS IC Features Cost/performance-optimized UPN-interface transceiver, compatible to PEB 2096 OCTAT-P HDLC-controller with 2 x 32 byte FIFO per direction

997160

Abstract: 8057 DMA
Contextual Info: TMP320C40KGD, SMJ320C40KGD FLOATING-POINT DIGITAL SIGNAL PROCESSORS KNOWN GOOD DIE S P R S 0 3 6 -N O V E M B E R 1995 Commercial Operating Temperature Range 0°C to 70°C Military Operating Temperature Range -55°C to 125°C; QML Processing Highest Performance Floating-Point Digital

DSP56300

Abstract: HAD31-HAD8 hd15-hd0 hd16a
Contextual Info: NOTE: In a Universal Bus mode HM = $2 or $3 , when both the TREQ and RREQ control bits (in the HCTR) are cleared, host interrupt request / strobe / acknowledge hardware handshake (using the HIRQ / Data Strobe / HTA pins) is disabled. The host may poll the HTRQ, HRRQ status bits or use the

SLB 9635

Abstract: SLE 78 slb 9635 tt 1.2 TPM infineon SLB 9635 TT iso 10373-1 MSD 7816 SLE 5542 88CNFX6600PM SLM76CF3201P 78CLX1280P
Contextual Info: Infineon Chip Card and Security ICs Portfolio Proven security you can trust [ www.infineon.com/ccs ] The Integrity Guard concept marks the dawn of the Digital Security Era. The SLE 78 controller family with Integrity Guard radicalizes design-in by easing