CD74HC112NSR
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 |
|
|
SN74HC112DR
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
|
|
CD74HC112E
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
|
|
CD74HC112M96
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
|
CD74HC112MT
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
|