M53S64322A Search Results
M53S64322A Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: ESMT M53S64322A 2E Mobile DDR SDRAM 512K x 32 Bit x 4 Banks Mobile DDR SDRAM Features z z z z z z z z z z JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. |
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M53S64322A |