M2V64S50ETP Search Results
M2V64S50ETP Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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sdr sdram reference
Abstract: sdr sdram
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E0364M20 M2V64S50ETP-I M2V64S50ETP-I 288-word 32-bit, 100MHz 133MHz M01E0107 sdr sdram reference sdr sdram | |
Contextual Info: SDR SDRAM E0364M11 Ver.1.1 (Previous Rev.0.3e) February 2004 (K) Japan PRELIMINARY DATA SHEET M2V64S50ETP-I 64M Single Data Rate Synchronous DRAM WTR (Wide Temperature Range) DESCRIPTION M2V64S50ETP-I is a 4-bank x 524,288-word x 32-bit, synchronous DRAM, with LVTTL interface. |
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E0364M11 M2V64S50ETP-I M2V64S50ETP-I 288-word 32-bit, 100MHz 133MHz M01E0107 | |
Contextual Info: SDR SDRAM E0342M21 Ver.2.1 February 2004 (K) Japan PRELIMINARY DATA SHEET M2V64S50ETP 64M Single Data Rate Synchronous DRAM DESCRIPTION M2V64S50ETP is a 4-bank x 524,288-word x 32-bit, synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. |
Original |
E0342M21 M2V64S50ETP M2V64S50ETP 288-word 32-bit, 100MHz 133MHz 166MHz M01E0107 | |
sdr sdram reference
Abstract: M2V64S50ETP
|
Original |
E0342M21 M2V64S50ETP M2V64S50ETP 288-word 32-bit, 100MHz 133MHz 166MHz M01E0107 sdr sdram reference |