M-BUS RAM Search Results

STO1A

Abstract: MH89760B MH89790B MT8920B MT8920BE MT8920BP MT8920BS MT8976 MT8979
Contextual Info: ISO-CMOS ST-BUS FAMILY MITEL MT8920B ST-BUS Parallel Access Circuit Features ISSUE 7 M arch 1997 • High speed parallel access to the serial ST-BUS • Parallel bus optim ized for 68000 jaP m ode 1 MT8920BE • Fast d u a l-p ort RAM access (m ode 2)

Contextual Info: Am2961/Am2962 A m 2961/A m 2962 4-B it Error Correction M ultiple Bus Buffers DISTINCTIVE CHARACTERISTICS Provides complete data path interface between the Am2960 Error Detection and Correction Unit, the sys­ tem data bus and dynamic RAM memory Three-state 24mA output to data bus

Am2960 applications note

Abstract: RAM circuit diagram
Contextual Info: Am2961/Am2962 A m 2961/A m 2962 4-B it Error Correction M ultiple Bus Buffers DISTINCTIVE CHARACTERISTICS Provides complete data path interface between the Am2960 Error Detection and Correction Unit, the sys­ tem data bus and dynamic RAM memory Three-state 24mA output to data bus

RRU 32

Abstract: RRU+32
Contextual Info: MITEL M T8920/M T8920-1 ST-BUS Parallel Access Circuit » ISO-CMOS ST-BUS" FA M ILY 9 16 1-0 02-0 84-N A ISSUE 4 Features • High speed parallel access to th e serial ST-BUS. • Parallel bus to serial bus in te rfa ce op tim ize d fo r 68000 p.P m ode 1 .

AN11017

Contextual Info: AN11017 Transceiver OL2381 using wireless M-BUS Rev. 2 — 10 May 2011 Application note Document information Info Content Keywords OL2381, Transceiver, 868 MHz, wireless M-BUS, OMS. Abstract This document describes how to use OL2381 in Wireless M-BUS applications.

BUS-68015

Abstract: common mode rejection ratio test 1553B BUS-68005 STANAG 3838 encoder 65531 BU-65550 BUS-69005 BUS-65522 stanag BUS-65515
Contextual Info: ¡S S S oev.ce MIL-STD-1553 DATA BUS PRODUCTS MIL-STD-1553 DATA BUS PRODUCTS PRODUCT SUM M ARY TABLE • TRANSCEIVERS —Sinale MODEL BUS-63102 ft BUS-6310411

Pinout Diagram for IC 7400

Abstract: stc 1740 7400ac
Contextual Info: MITEL SEMI CONDUCTOR O B M ITEL 3SE D bSM^37Q 00Gta77S S iniTC MT8920/MT8920-1 ST-BUS Parallel Access Circuit « ISO-CMOS ST-BUS” f a m i l y ~ T - 7 S~ - /S ~ 9161-002-084-NA Features • High speed parallel access to the serial ST-BUS. • Parallel bus to serial bus interface optimized for

740i

Abstract: 740S2 MT8920 X2930
Contextual Info: MITEL MT8920/MT8920-1 ST-BUS Parallel Access Circuit ISO-CMOS ST-BUS" FAM ILY 9161-002-084-NA ISSUE 4 Features • High speed parallel access to the serial ST-BUS. • Parallel bus to serial bus in terface optim ized fo r 68000 pP m ode 1 . • Fast dual-port RAM access (mode 2).

Contextual Info: ISO-CMOS ST-BUS FAMILY MT8920 ST-BUS Parallel Access Circuit M IT E L Features • High speed parallel access to the serial ST-BUS • Parallel bus optimized for 68000 nP mode 1 • Fast dual-port RAM access (mode 2) • Access time: 120nsec Parallel bus controller (mode 3) - no external

Contextual Info: MITEL* ISO-CMOS ST-BUS FAMILY MT8920B ST-BUS Parallel Access Circuit Features • ISSUE 5_May 1995 High speed parallel access to the serial ST-BUS • Parallel bus optim ized for 68000 pP mode 1 • Fast d u al-port RAM access (m ode 2)

SAB 82258

Abstract: dv3c Dwo1 pin diagram priority encoder 74146 82258 DV12C FSV 052 interfacing 8289 with 8086 8283A DX14C
Contextual Info: SAB 82220 Bus Interface Controller BIC • H ighly integrated m icroprocessor system support com ponent • Six modes o f operation fo r flexible adaption to different applications • Integrates into one package m icroprocessor interface logic, like bus drivers, bus control

3940S-3

Abstract: Bull Micral of America 486 system bus micral processor cpu memory AZ9031 block diagram of processor 80486 14T1 microchannel A29031
Contextual Info: AZ9031 Memory / Bus Controller* Introduction The Dual Port M em ory C ontroller / Bus and Processor Controller described herein, acts as the functional control link between the synchronous and asynchronous environments found in the SLIK bus, and the M icro Channel

BUS-66300

Contextual Info: QQQ BUS-66312 ILC D ATA D E V IC E CO RPO RATIO N _ MIL-STD-1553 TO MICROPROCESSOR INTERFACE UNIT REFER TO BUS-61553 FOR MEMORY MANAGEMENT DESCRIPTION AND TIMING. DESCRIPTION DDC's BUS-66312 M IL-S TD -1553 to M icroprocessor Interface Unit sim plifies the CPU to 1553 Data Bus interlace

ATA13

Contextual Info: HIGH-SPEED 16Kx 16 DUAL-PORT STATIC RAM PRELIMINARY IDT7026S/L Integrateci Device Technology, Inc FEATURES: multiplexed bus com patibility IDT7026 easily expands data bus width to 32 bits or m ore using the M aster/S lave select w hen cascading m ore than o ne d e vice

mc3441

Abstract: MC3440A
Contextual Info: MC3440A MC3441A MC3443A MOTOROLA QUAD INTERFACE BUS TRANSCEIVERS QUAD GENERAL-PURPOSE INTERFACE BUS GPIB TRANSCEIVERS SILICON MONOLITHIC INTEGRATED CIRCUITS T h e M C 3 4 4 0 A , M C 3 4 4 1 A , M C 3 4 4 3 A are q u a d bus transceivers in te n d e d fo r

SMD making code 2f

Abstract: Intel 8237 dma 8237 DMA Controller intel embedded microcontroller handbook ISP1181 phillips handbook ISP1181DGG TSSOP48 PID controller
Contextual Info: eed Universal Serial Bus interface device 13 M arch 2000 Objective specification UNIVERSAL SERIAL BUS 1, General d escription The ISP1181 is a Universal Serial Bus USB interface device which complies with Universal Serial Bus Specification Rev. 1.1. It provides full-speed USB

16550 uart

Abstract: 16550 uart 16550 "Programmable Interrupt Controller" AM5x86 PCI I/O interface Programmable Controller sdram controller bus arbiter
Contextual Info: A D V A N C E I N F O R M A T I O N Address Decode Unit Address GP Bus Controller GP Bus Clock Generation External GP Bus Programmable Interrupt Controller Programmable Interval Timer CPU Bus Interface CPU Bus Arbiter Read/Write Buffers ROM/Flash Controller

DM74ALS2

Abstract: 3bs3 DM74ALS244 dm74al
Contextual Info: S E M IC O N D U C T O R tm DM74ALS244A/74ALS244B-1 Octal 3-STATE Bus Driver General Description Features This octal 3-STATE bus driver is designed to provide the d e ­ signer with flexib ility in im plem enting a bus interface with memory, m icroprocessor, o r com m unication system s. This

Contextual Info: IS61ZB12836 m 128K x 36 SYNCHRONOUS STATIC RAM ZERO TURNAROUND BUS AND PIPELINE ADVANCE i INFORMATION FEBRUARY 1998 FEATURES DESCRIPTION • 100 percent bus utilization The IS61ZB12836 is a high-speed, low-power synchronous static RAM designed to provide a burstable, highperformance, zero turnaround bus, secondary cache for the

Contextual Info: • bS4R37D D D075E3 7bb ■ M IT C ISO-CMOS ST-BUS" FAMILY MT8920B ST-BUS Parallel Access Circuit MITEL* February 1992 Features • • • • • • • • Pin Connections High speed parallel access to th e serial ST-BUS. Parallel bus to serial bus interface optim ized for

BUS-65112

Abstract: 2a1043 BUS-25679 115IS
Contextual Info: QQQ ILC DATA DKVICK CORPORATION _ BUS-65112 AND BUS-65117 MIL-STD-1553 DUAL REDUNDANT REMOTE TERMINAL HYBRID FEATURES • SMALL SIZE & LOW POWER • COMPLETE R TU PROTOCOL BUS-65112 DDIP BUS-65117 FLATPACK DESCRIPTION T he BUS-65112 is a c o m p le te d u a l

Contextual Info: INTEGRATED CIRCUITS [M m 74F777 Triple bidirectional latched bus transceiver 3-State + open collector Product specification 1992 May 19 IC15 Data Handbook Philips Semiconductors PHILIPS Philips Semiconductors Product specification Triple bidirectional latched bus transceiver (3-S tate +

ALS240A-1

Abstract: DM74ALS240A als240a 74ALS DM64ALS240AWM DM74ALS241 DM74ALS240AWM
Contextual Info: Semiconductor D M 7 4A L S 2 4 0 A /D M 7 4 A L S 2 4 1 A /7 4 A L S 2 4 0 A -1 / D M 64A LS240A O ctal TR I-STA TE Bus Driver General Description Features These octal TRI-STATE bus drivers are designed to provide the designer with flexibility in implementing a bus interface

bsc 68e

Abstract: C68334 IC68000 motorola 68000
Contextual Info: O rder this docum ent by M C 6 8 3 0 7 /D MOTOROLA SEMICONDUCTOR TECHNICAL INFORMATION MC68307 MC68307V Technical Summary Integrated Multiple-Bus Processor The M C68307 is an integrated processor com bining a static 68EC 000 processor w ith m ultiple interchip bus