M 74G 49 Search Results

Contextual Info: SN54GTL16612A, SN74GTL16612A 18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS SCES187 - JANUARY 1999 Members of the Texas Instruments Widebus Family S N 54G TL16612A . . . W D PACKAGE SN74G TL16612A . . . DGG OR DL PACKAGE TOP VIEW OEAB [ 1 LE A B [ 2

Contextual Info: SN54GTL16612, SN74GTL16612 18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS SCBS480H - JUNE 1994-R E V IS E D NOVEMBER 1998 Members of the Texas Instruments Widebus Family SN54G TL16612 . . . W D PACKAGE SN 74G TL16612 . . . DGG OR DL PACKAGE TOP VIEW

Contextual Info: SN54GTL1655, SN74GTL1655 16-BIT LVTTL TO GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION SCBS696D - JULY 1997 - REVISED AUGUST 1998 • Members of the Texas Instruments Widebus Family • Translate Between GTL/GTL+ Signal Level and LVTTL • •

LM 6863 D

Abstract: 0/LM 6863 D
Contextual Info: — Robinson M ugsnt 50 Mil Connectors ~ ~ ~ With Power Ground Pin P50 Series * 20-100 position product * EMLB power/ground pins allow "hot board" replacement and discharge of static electricity * 2 amps/power ground pin * Low insertion/withdrawal force * Redundant ribbon contact design

IEEE1194

Abstract: SN74GTL16921
Contextual Info: SN74GTL16921 20-BIT FLIP-FLOP WITH GTL I/O LEVELS S C B S 3 1 3 -J U L Y 1 9 9 3 - R E V IS E D MARCH 1994 EPIC-TIB Enhanced-Performance Implanted CMOS Submicron Process Members of the Texas Instruments Widebus™ Family Provides GTL Signals Levels on Both

FL001T

Abstract: 905S12H 905S5H 1215d5h DC/DC CONVERTER 1215D5H 1215D12H cdi dc/dc 605D5H 905S24H 1215D24H
Contextual Info: Distributed B y: B. J. W olfe E n terprises, Inc. info@ bjw e.com , 800 554-1224, Fax (818) 889-8417 I Low Proiile, i x 1 x UJW inch Package ► W ide -30°C to +75°C Temperature Range ►± 0.03% Max. Line/Load Regulation ► Low Output Noise & Ripple, <10 m V Pk-Pk

LT1K92A

Contextual Info: 11/01 1 ! :09 P. 02/33 . . .:. ‘2 ‘“””’ ; ~ ‘3 /3 ~~~ ., SflARP CORPORATION TECIINICAL LITERATURE FOR GaP/CaP Green chip LED Device MODEL NO. LT1K92A DOC. NO. DG- 94X107 DATE Oct. 31. 1994 1. These technical literature sheets include the contents under the copyright of

Contextual Info: fu HI1396Y H A R R IS S E M I C O N D U C T O R 8-Bit, 125 MSPS Flash A/D Converter April 1995 Features Description Differential Linearity E r r o r ±0.5 LSB Typ or Less T h e H I13 96 Y is an 8-bit ultra high speed flash analog-to-digital converter IC capable of digitizing analog signals at the

3503h

Abstract: AB0612HX-HCO AB0712H 9251H 0412U 4512H AD0412XB-G7 AD0612HS-G B10B300 0412M
Contextual Info: PECIFICATION FOR APPROVA i TO : _ REF. No. CHECKED APPROVED DATE / \ HI-10-15, \ | * £ / MODEL No. [mm 1^ ) PREPARED — DATE / ^ t f \ • f WO-15, 1 AD0205DX-K50 DESCRIPTION: DC FAN (Rgjjg)_ ps _ _ REV- B ID No. THIS OFFER IS MADE ACCORDING TO YOUR CURRENT INQUIRY

74hc74g

Abstract: MFC 6030 UPD74HC04 nec 04721 nec fs 2181 UPD74HC74 l0234 PD74HC74C Q565 UPD74HC74G
Contextual Info: 7 s— S * V • — h SEC m o s m m uss M O S Integrated Circuit uPD74HC74 D U A L D - T Y P E F L I P - F L O P W IT H P R E S E T A N D R E S E T cmos yuPD74HC74C, D -T Y P E 74HC74G, F L IP -F L O P A t s r - 9 W IT H 7u~; 9 fi, ¡ 5 $ C M O S f f i p o i?

pinout 7420

Contextual Info: 256K X 32 SRAM MODULE mosaic PUMA 68S8000X-15/17/20/25 semiconductor, inc. Issue 1.2 : January 1997 Description Features The PUMA 68S8000X is a 8Mbit CMOS High Speed Static RAM organised as 256K x 32 in a JEDEC 68 pin surface mount PLCC, available with access times of

SN54GTL16612

Abstract: SN74GTL16612
Contextual Info: SN54GTL16612, SN74GTL16612 18-BIT GTL/LVT UNIVERSAL BUS TRANSCEIVERS SC BS4aoC-JUNE 19 9 4 - R E V IS E D JULY 1995 Translate Between GTL Logic Levels and LVTTL or 5-V TTL Logic Levels SN 54G TL16612. . . W D PACKAGE SN 74G TL16612 . . . DG G O R D L PACKAG E

SMD IC ATD

Contextual Info: L M U 16/216 16 x 16-bit Parallel Multiplier DESCRIPTION FEATURES □ 45 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces TRW MPY016/TMC216, Cypress CY7C516, IDT 7216L, and AMD Am29516 □ Two's Com plem ent, Unsigned, or Mixed O perands

Contextual Info: I LTC1069-7 M TECHNOLOGY F€O TUR€S • 8th Order, Linear Phase Filter in S0-8 Package ■ Raised Cosine Amplitude Response ■ —43dB Attenuation at 2x fcuTOFF ■ Wideband Noise: 140jj,Vrms ■ Operates from Single 5V Supply to ±5V Power Supplies ■ Clock-Tunable to 200kHz with ±5V Supplies

SN54GTL16923

Abstract: SN74GTL16923
Contextual Info: SN54GTL16923, SN74GTL16923 18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS SCBS674B - A UG UST 1996 - R E V IS E D D ECEM B ER 1996 Translate Between GTL/GTL+ Signal Levels and LVTTL or 5-V TTL Signal Levels D-Type Flip-Flops With Qualified Storage Enable Members of the Texas Instruments

Contextual Info: H Y 5 1 V 16 4 1 O A S e r ie s “HYUNDAI 4M X 4-bit CMOS DRAM with WPB PRELIMINARY DESCRIPTION The HY51V16410A is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. The HY51V16410A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

qml-38535

Abstract: CDFP2-F10 CQCC1-N20 GDFP1-F10 LM6164 10-lead flat pack E373
Contextual Info: REVISIONS DATE YR-MO-DA APPROVED Add case outlines H and 2. Make changes to 1.2.2, 1.3, 6.6, and figure 1. In accordance with N.O.R. 5962-R079-92._ 91-12-05 M. A. FRYE Add case outline X which is a 10 lead flat pack. Make changes to 1.2.2,1.3,

Contextual Info: DATA SHEET NEC M O S INTEGRATED CIRCU IT MC-421000AD72F 1 M-WORD BY 72-BIT DYNAM IC RAM MODULE FAST PAGE MODE ECC D e scrip tio n T h e M C - 4 2 1 0 0 0 A D 7 2 F is a 1 ,0 4 8 ,5 7 6 w o r d s b y 7 2 b its d y n a m ic R A M m o d u le o n w h ic h 4 p ie c e s o f 16 M

CO-402B 12MHz

Abstract: 4N2b
Contextual Info: in y M87C51FC CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 32 KBYTES USER PROGRAMMABLE EPROM Military M87C51FC—3.5 MHz to 12 MHz, Vcc = 5V + 20% M87C51FC-1—3.5 MHz to 16 MHz, Vcc = 5V±20% High Performance CHMOS EPROM 32 Programmable I/O Lines Three 16-Bit Timer/Counters

GTL1655

Abstract: SN54GTL1655 SN74GTL1655
Contextual Info: SN54GTL1655, SN74GTL1655 16-BIT LVTTL TO GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION S C B S696C - JU LY 1997 - REVISED MAY 1998 Members of the Texas Instruments Widebus Family SN74GTL1655 . . . DGG PACKAGE TOP VIEW Translate Between GTL/GTL+ Signal Level

K12J

Abstract: 100-PIN CY7C346 CY7C346B f 7400
Contextual Info: CY7C346 CY7C346B 5T CYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirec­ tional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346

AFB0712VHB

Abstract: AFB0712HHB AFB1224SHE AFB0805H AFB0824VH AFB0712MB afb0612ehe AFB0824SH AFB0712VHD AFB0712HB
Contextual Info: AFB 25 x 25 x 10 MM SERIES DIMENSIONS DRAWING 25.0 0.5 0.984 0.020 10.0 0.5 20.0 0.3 (0.787 0.012) 25.0 0.5 (0.984 0.020) 20.0 0.3 (0.787 0.012) (0.394 0.020) LABEL 10.0 (0.394) 4- 2.8 0.3 (4- 0.110 0.012) * Bearing Type P & Q CURVE (AT RATED VOLTAGE) 9.0

wiring diagram of cctv camera

Abstract: circuit diagram of cctv cameras with high sensitivity CCTV System pcb of cctv camera wiring diagram cctv camera JVC colour tv circuit diagram 12VDC 18 OUTPUT SWITCH MODE CCTV POWER SUPPLY CC Colour television picture tube connection details close up cctv camera circuit diagram
Contextual Info: CCTV surveillance and industrial systems Introduction The RS closed-circuit television system may be used in most daytime to dusk internal/external security or surveillance applications. The RS CCTV system also offers a close up, MACRO zoom lens capability catering for

Contextual Info: Intel. InteI/40 Graphics Accelerator Datasheet Release Date: April, 1998 Order Number: 2^06 :8-00:^ Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual