LVDS LEVEL TRANSLATOR Search Results

IN50

Abstract: MAX9180 MAX9181 MAX9181EXT-T SC70-6
Contextual Info: 19-2415; Rev 0; 4/02 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between

LVPECL multidrop

Abstract: IN50 MAX9180 MAX9181 MAX9181EXT-T SC70-6
Contextual Info: 19-2415; Rev 1; 2/04 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between

Contextual Info: 19-2415; Rev 1; 2/04 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package The MAX9181 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between

PTN3310

Abstract: PTN3311 PTN3331 PTN3332 PTN3341 PTN3342 SN65LVDS31 SN65LVDS32 PTN3331DH-T LVDS Line Driver
Contextual Info: PTN3331/PTN3332/ PTN3341/PTN3342 High-performance LVDS-LVTTL Quad Logic Translator Family Philips offers a family of high-speed logic translator ICs, providing a solution for logic level translation between LVTTL and LVDS low-voltage differential signaling . These LVDS drivers and

VSC6431

Abstract: VSC6432 LVDS Level Translator 333Mhz
Contextual Info: 333Mb/s 17 Channel LVDS to ECL Level Translator VSC6431 Product Brief Timing and Logic Features: • 333MHz / 333Mb/s Operation • ECL to LVDS Level Translation • -2V and +3.3V Power Supplies • 128-pin Thermally Enhanced PQFP Packaging • 16 Data Channels, 1 Frame

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives

C101

Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives

vid 200

Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives

vid 200

Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES DESCRIPTION D Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML D Signaling Rates1 up to 1.5 Gbps D CML Compatible Output Directly Drives

uA 741

Abstract: BIT3107 VSC6431 internal circuit diagram of IC 741
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC6431 LVDS to ECL Level Translator Features • • • • • 333MHz/ 333Mb/s Operation Data and Frame Retiming LVDS Inputs and ECL Outputs 16 Data Channels 1 Frame Channel with 4 Fanouts • 1 Clock Channel with 2 Fanouts

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

TT-800

Abstract: C101 SN65CML100 SN65CML100D SN65CML100DGK TDS6604 MV-1Y
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

C101

Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

C101

Abstract: SN65CML100 SN65CML100D SN65CML100DGK TDS6604 CML100
Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

Contextual Info: SN65CML100 www.ti.com SLLS547 – NOVEMBER 2002 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER FEATURES • • • • • • • • • • DESCRIPTION Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML Signaling Rates 1 up to 1.5 Gbps

N100

Abstract: NB100LVEP91 NB100LVEP91DW NB100LVEP91DWR2
Contextual Info: NB100LVEP91 2.5V / 3.3V Any Level Positive Input to −2.5V / −3.3V / −5V NECL Output Translator The NB100LVEP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential

N100

Abstract: NB100LVEP91 NB100LVEP91DW NB100LVEP91DWR2 qfn-24 4x4
Contextual Info: NB100LVEP91 2.5V / 3.3V Any Level Positive Input to −2.5V / −3.3V / −5V NECL Output Translator The NB100LVEP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential

Contextual Info: NB100LVEP91 2.5V / 3.3V Any Level Positive Input to −2.5V / −3.3V / −5V NECL Output Translator http://onsemi.com Description The NB100LVEP91 is a triple any level positive input to NECL output translator. The device accepts LVPECL, LVTTL, LVCMOS, HSTL, CML or LVDS signals, and translates them to differential