LVDS 50 PIN Search Results

Contextual Info: NB3L14S 2.5 V 1:4 LVDS Fanout Buffer The NB3L14S is a differential 1:4 LVDS Clock fanout buffer. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. The NB3L14S LVDS signals will be buffered and replicated to identical LVDS copies of the Input

RF based remote control

Abstract: DS92LV2412 Programmable LVDS Receiver 24-Bit RGB
Contextual Info: DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface General Description Features The DS92LV0411 serializer and DS92LV0412 (deserializer) chipset translates a Channel Link LVDS video interface (4 LVDS Data + LVDS Clock) into a high-speed serialized interface over a single CML pair.

CY2X013

Contextual Info: CY2X013 LVDS Crystal Oscillator XO LVDS Crystal Oscillator (XO) Features Functional Description n Low jitter crystal oscillator (XO) n Less than 1 ps typical root mean square (RMS) phase jitter n Low-voltage differential signaling (LVDS) output n Output frequency from 50 MHz to 690 MHz

4MA148500Z4AACUGI

Contextual Info: 148.50 MHz LVDS Oscillator 4MA148500Z4 High Performance Differential MEMS Oscillator DATASHEET Features Frequency: Output Type: Frequency Stability: Supply Voltage: Standard Packages: RMS phase jitter: Operating Temperature: 148.50 MHz LVDS ± 50 ppm 2.5V & 3.3V

6 PIN SMD Z4

Contextual Info: 156.25 MHz LVDS Oscillator 4MA156250Z4 High Performance Differential MEMS Oscillator DATASHEET Features Frequency: Output Type: Frequency Stability: Supply Voltage: Standard Packages: RMS phase jitter: Operating Temperature: 156.25 MHz LVDS ± 50 ppm 2.5V & 3.3V

manual temperature controller CHB 702

Abstract: temperature controller CHB 402 manual transistor C734 diode c649 transistor C640 32C114 diode c741 smd diode c644 smd diode c549 transistor C618
Contextual Info: Octal, 14-Bit, 50 MSPS Serial LVDS 1.8 V A/D Converter AD9252 8 ADCs integrated into 1 package 93.5 mW ADC power per channel at 50 MSPS SNR = 73 dB to Nyquist Excellent linearity DNL = ±0.4 LSB (typical) INL = ±1.5 LSB (typical) Serial LVDS (ANSI-644, default)

Contextual Info: 150.00 MHz LVDS Oscillator 4MA150000Z4 High Performance Differential MEMS Oscillator DATASHEET Features Frequency: Output Type: Frequency Stability: Supply Voltage: Standard Packages: RMS phase jitter: Operating Temperature: 150.00 MHz LVDS ± 50 ppm 2.5V & 3.3V

4MA200000Z4

Contextual Info: 200.00 MHz LVDS Oscillator 4MA200000Z4 High Performance Differential MEMS Oscillator DATASHEET Features Frequency: Output Type: Frequency Stability: Supply Voltage: Standard Packages: RMS phase jitter: Operating Temperature: 200.00 MHz LVDS ± 50 ppm 2.5V & 3.3V

4MA125000Z4BACUGI

Abstract: 4MA125000Z4
Contextual Info: 125.00 MHz LVDS Oscillator 4MA125000Z4 High Performance Differential MEMS Oscillator DATASHEET Features Frequency: Output Type: Frequency Stability: Supply Voltage: Standard Packages: RMS phase jitter: Operating Temperature: 125.00 MHz LVDS ± 50 ppm 2.5V & 3.3V

6-pin "454"

Contextual Info: CY2XF33 High-Performance LVDS Oscillator With Frequency Margining – Pin Control Features Functional Description • Low jitter crystal oscillator XO ■ Less than 1 ps typical RMS phase jitter ■ Differential LVDS output ■ Output frequency from 50 MHz to 690 MHz

DS92LV2412

Contextual Info: DS92LV0411 / DS92LV0412 May 26, 2010 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface General Description Features The DS92LV0411 serializer and DS92LV0412 (deserializer) chipset translates a Channel Link LVDS video interface (4

Contextual Info: SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6 General Description Features The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100%

SPA28A

Abstract: IEEE 1149.6
Contextual Info: SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6 General Description Features The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100%

AN-1313

Contextual Info: SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch with Pre-Emphasis and IEEE 1149.6 General Description Features The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100%

LM350T Equivalent

Abstract: schematic diagram scart to usb schematic diagram vga to rca schematic diagram vga to svideo schematic diagram vga to scart fld pcb LM317T pin configuration schematic diagram vga to rca cable connector 100MHZ 47UF
Contextual Info: AN-50 Chrontel CHRONTEL CHRONTEL CHRONTEL Application Notes PCB Layout and Design Considerations for CH7017 LVDS/TV Output Device 1. Introduction This application note focuses on the basic PCB layout and design guidelines for the CH7017 LVDS/TV Output Device.

lvds 32 pin

Abstract: Xilinx XCV300 XCV300E RT1710B6 of 30 pin LVDS BG432 RT1723B6 RT1722B7 LVDS transmitter "return channel" Z050
Contextual Info: Note Number AN-C1-FPGALVDS-A FPGA LVDS INTERFACE APPLICATION NOTE SIMPLIFY BOARD LAYOUT USING LVDS TERMINATORS INTRODUCTION 140 ohms, whereas the series pair consists of 165 ohms each. See figure 2 below. Note: these values assume a 50-Ohm characteristic impedance on the

Contextual Info: 19-2155; Rev 0; 10/01 Single 500Mbps LVDS Line Receiver in SC70 Features ♦ Space-Saving SC70 Package 50% Smaller than SOT23 ♦ Guaranteed 500Mbps Data Rate ♦ Low 250ps (max) Pulse Skew ♦ High-Impedance LVDS Inputs When Powered Off Allow Hot Swapping

MAX9130EXT-T

Abstract: MAX9115 MAX9130 SC70-6
Contextual Info: 19-2155; Rev 0; 10/01 Single 500Mbps LVDS Line Receiver in SC70 Features ♦ Space-Saving SC70 Package 50% Smaller than SOT23 ♦ Guaranteed 500Mbps Data Rate ♦ Low 250ps (max) Pulse Skew ♦ High-Impedance LVDS Inputs When Powered Off Allow Hot Swapping

Contextual Info: CY2DL818 1:8 Clock Fanout Buffer Features Low voltage operation VDD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or LVTTL 8 pair of LVDS Outputs Drives either a 50-ohm or 100-ohm load selectable Low input capacitance Low output skew Low propagation delay

n10 smd 6-pin

Abstract: SMHU 68r smd code
Contextual Info: Quad 12-Bit, 50/65 MSPS, Serial, LVDS 3 V A/D Converter AD9229 FEATURES Four ADCs in one package Serial LVDS digital output data rates to 780 Mbps ANSI-644 Data and frame clock outputs SNR = 69.5 dB (to Nyquist) Excellent linearity DNL = ±0.3 LSB (typical)

CY2DL818

Abstract: CY2DL818ZC CY2DL818ZCT CY2DL818ZI CY2DL818ZIT
Contextual Info: CY2DL818 1:8 Clock Fanout Buffer Features Low voltage operation VDD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or LVTTL 8 pair of LVDS Outputs Drives either a 50-ohm or 100-ohm load selectable Low input capacitance Low output skew Low propagation delay

yageo R68 choke

Abstract: smd n10 inverter PCB yageo smd 1206 0603 smd resistor ANSI-644
Contextual Info: Quad 12-Bit, 50/65 MSPS, Serial, LVDS 3 V A/D Converter AD9229 FEATURES Four ADCs in one package Serial LVDS digital output data rates to 780 Mbps ANSI-644 Data and frame clock outputs SNR = 69.5 dB (to Nyquist) Excellent linearity DNL = ±0.3 LSB (typical)

transistor C618

Abstract: smdc110f ROHDE SCHWARZ SMHU SNT-100-BK-G-H yageo smd 1206 fuse resistor C620 diode C621 c630 diode L413 MV C632
Contextual Info: Quad, 12-Bit, 50/65 MSPS, Serial, LVDS, 3 V A/D Converter AD9229 FEATURES Four ADCs in 1 package Serial LVDS digital output data rates to 780 Mbps ANSI-644 Data and frame clock outputs SNR = 69.5 dB (to Nyquist) Excellent linearity DNL = ±0.3 LSB (typical)

ic 9435

Abstract: 9435 Ic chip m3131
Contextual Info: Introduces M31x Series Multiple Frequency LVPECL/LVDS/CML/HCMOS VCXO Featuring QiK ChipTM Technology Features:  Multiple Output Frequencies 2, 3, or 4 - Selectable  Superior Jitter Performance (less than 0.25 ps RMS, 12 kHz 20 MHz)  Frequencies from 50 MHz to 1.4 GHz (LVDS/LVPECL/CML), and