LVDS 50 PIN Search Results

Contextual Info: M31x Series Multiple Frequency VCXO 5x7 mm, 3.3/2.5/1.8 Volt, LVPECL/LVDS/CML/HCMOS Output Features: • Multiple Output Frequencies 2, 3, or 4 - Selectable • QiK ChipTM Technology • Superior Jitter Performance (comparable to SAW based) • Frequencies from 50 MHz - 1.4 GHz (LVDS/LVPECL/CML) and

7668

Abstract: samtec VOL
Contextual Info: Quad, 14-Bit, 50 MSPS Serial LVDS 1.8 V ADC AD9259 Data Sheet 4 ADCs integrated into 1 package 98 mW ADC power per channel at 50 MSPS SNR = 73 dB to Nyquist ENOB = 12 bits SFDR = 84 dBc (to Nyquist) Excellent linearity DNL = ±0.5 LSB (typical) INL = ±1.5 LSB (typical)

C101

Abstract: SN65LVCP22 SN65LVCP23 SN65LVCP23D SN65LVCP23PW SN65LVDS101
Contextual Info: SN65LVCP23 www.ti.com SLLS554B – NOVEMBER 2002 – REVISED JUNE 2003 2x2 LVPECL CROSSPOINT SWITCH FEATURES D High Speed 2x2 LVPECL Crosspoint Switch D LVDS Crosspoint Switch Available in SN65LVCP22 D 50 ps Typ , of Peak-to-Peak Jitter With PRBS = 223–1 Pattern

Contextual Info: SN65LVDS048A LVDS QUAD DIFFERENTIAL LINE RECEIVER SLLS451B– SEPTEMBER 2000 – REVISED SEPTEMBER 2002 D >400 Mbps 200 MHz Signaling Rates D Flow-Through Pinout Simplifies PCB D D D D D D D D D D D D Layout 50 ps Channel-to-Channel Skew (Typ) 200 ps Differential Skew (Typ)

Contextual Info: SN65LVDS049 5,0 mm x 6,4 mm www.ti.com SLLS575 – AUGUST 2003 DUAL LVDS DIFFERENTIAL DRIVERS AND RECEIVERS FEATURES • • • • • • • • • • • • • • DS90LV049 Compatible Up to 400 Mbps Signaling Rates Flow-Through Pin-out 50 ps Driver Channel-to-Channel Skew Typ

Contextual Info: SN65LVCP23 www.ti.com SLLS554E – NOVEMBER 2002 – REVISED MAY 2006 2x2 LVPECL CROSSPOINT SWITCH FEATURES • • • • • • • • • • High Speed 2x2 LVPECL Crosspoint Switch LVDS Crosspoint Switch Available in SN65LVCP22 50 ps Typ , of Peak-to-Peak Jitter With

Contextual Info: SN65LVCP23 www.ti.com SLLS554D – NOVEMBER 2002 – REVISED MARCH 2006 2x2 LVPECL CROSSPOINT SWITCH FEATURES • • • • • • • • • • High Speed 2x2 LVPECL Crosspoint Switch LVDS Crosspoint Switch Available in SN65LVCP22 50 ps Typ , of Peak-to-Peak Jitter With

tr/xo 403 me

Contextual Info: PRELIMIN NARY S SPECIIFICAT TIONS Model: F FXU-LC53 3 SERIES LVDS 5 x 3.2 2mm 3.3V Oscillatorr Fre eq: 0.016 MHz to 1.5GHz R Rev. 10/11/2013 F Features ULTRA Low Jitter Low Cost XPRESS Delivery Frequen ncy Resolution to six dec cimal places s Stabilitie es to ± 50 PPM

Contextual Info: April 2005 DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis General Description Features The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/ repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout,

DS15BR400

Abstract: AN1194 DS15BR400EVK DS15BR401 TQFP-48
Contextual Info: DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with Pre-Emphasis General Description Features The DS15BR400/DS15BR401 are four channel LVDS buffer/ repeaters capable of datarates of up to 2 Gbps. High speed data paths and flow-through pinout minimize internal device

maxim 1909

Abstract: DS90LV048A MAX9121 MAX9121ESE MAX9121EUE MAX9122 MAX9123
Contextual Info: 19-1909; Rev 0; 6/01 KIT ATION EVALU LE B A IL A AV Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout _Features ♦ Integrated Termination Eliminates Four External Resistors MAX9122 ♦ Flow-Through Pinout

Contextual Info: SCAN15MB200 Dual 1.5 Gbps 1:2/2:1 LVDS Mux/Buffer with Pre-emphasis and IEEE 1149.6 General Description Features The SCAN15MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from

Contextual Info: SCAN15MB200 Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer with Pre-Emphasis and IEEE 1149.6 General Description Features The SCAN15MB200 is a dual-port 2 to 1 multiplexer and 1 to 2 repeater/buffer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from

Contextual Info: SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis and IEEE 1149.6 General Description Features The SCAN90004 is a four channel 1.5 Gbps LVDS buffer/ repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout,

serializer guide

Abstract: SLLS526E 8208 ns
Contextual Info: SN65LV1021/SN65LV1212 10-MHz TO 40-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526E – FEBRUARY 2002 – REVISED SEPTEMBER 2002 D D D D 100-Mbps to 400-Mbps Serial LVDS Data Payload Bandwidth at 10-MHz to 40-MHz System Clock Pin-Compatible Superset of NSM

Contextual Info: SN65LV1023A/SN65LV1224A 10ĆMHz TO 66ĆMHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS570D − JUNE 2003 − REVISED JANUARY 2005 D 100-Mbps to 660-Mbps Serial LVDS Data D D D Payload Bandwidth at 10-MHz to 66-MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224

Contextual Info: SN65LV1023A/SN65LV1224A 10ĆMHz TO 66ĆMHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS570D − JUNE 2003 − REVISED JANUARY 2005 D 100-Mbps to 660-Mbps Serial LVDS Data D D D Payload Bandwidth at 10-MHz to 66-MHz System Clock Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224

P620-2XOC

Abstract: PLL620-28 PLL620-2XOC PLL620-2XOC-R
Contextual Info: PLL620-28/-29 Low Phase Noise VCXO for 100-200MHz Fund Xtal PIN CONFIGURATION (Top View) FEATURES • • • • • • • 100MHz to 200MHz Fundamental Mode Crystal. Output range: 100 – 200MHz (no PLL). Low Injection Power for crystal 50uW. Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).

ABX8037

Abstract: ABX8037OC ABX8038 x8038
Contextual Info: Preliminary ABX8037/38/39 38-640MHz Low Phase Noise XO FEATURES 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GNDBUF SEL2^ 4 13 QBAR OE_CTRL 5 12 VDDBUF DNC 6 11 Q GNDANA 7 10 GNDBUF LP 8 9 LM 16-pin TSSOP SEL2^ 14 OE_CTRL 15 DNC 16 SEL0^ SEL1^ 11 10 9 ABX803X 1 2 3

str f 6552

Abstract: CV125 IDTCV125 str 6552 CK410M DOT96 LVDS SSC
Contextual Info: IDTCV125 PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR COMMERCIAL TEMPERATURE RANGE PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR DESCRIPTION: FEATURES: IDTCV125 is a 56 pin clock device, incorporating both Intel CK410M and CKSSCD requirements, for Intel advance P4 processors. The CPU output

Contextual Info: Micrel, Inc. 3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER Precision Edge Precision Edge® SY89532/33L SY89532L SY89533L FEATURES Integrated synthesizer plus fanout buffers, clock drivers , and translator in a single 64-pin package

Contextual Info: LMK01000/LMK01010/LMK01020 1.6 GHz High Performance Clock Buffer, Divider, and Distributor General Description Features The LMK01000/LMK01010/LMK01020 family provides an easy way to divide and distribute high performance clock signals throughout the system. These devices provide best-inclass noise performance and are designed to be pin-to-pin

Contextual Info: SN65LV1023/SN65LV1224 www.ti.com SLLS527G – FEBRUARY 2002 – REVISED JANUARY 2005 30-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER FEATURES • • • 300-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 30-MHz to 66-MHz System Clock Pin-Compatible Superset of NSM

ICH8M

Abstract: t7400 ALC883 GM965 RTL8111B ECM-GM965 gme965 lvds 1920 AC97 W83627HG-AW
Contextual Info: ECM-GM965 3.5" Intel GME965 Core 2 Duo Micro Module LAN 2 LAN 1 DIO VGA COM 2 Features n Supports 65nm Intel® µFC-PGA 478 / µFC-BGA 479 CoreTM 2 Duo CPU COM 1 n Intel® GME965 / ICH8-M Chipset n One 200-pin SODIMM up to 2 GB DDR2 SDRAM CF Socket solder side