LOGIC SYMBOL 74LS32 Search Results

ic ttl 7432

Abstract: specifications of IC 7432 supply voltage IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 7432 ic 74LS32 SIGNETICS 7432 pin configuration
Contextual Info: 7432, LS32, S32 Gates Signetics Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%: T a = 0°C to +70°C

Contextual Info: g MOTOROLA SN54/74LS322A 8-BIT SHIFT REGISTERS WITH SIGN EXTEND These 8-bit shift registers have multiplexed input/output data ports to accomplish full 8-bit data handling in a single 20-pin package. Serial data may enter the shift-right register through either DO or D1 inputs as selected by the

SN54LSXXXJ

Abstract: SN74LSXXXN
Contextual Info: SN54/74LS322A 8-BIT SHIFT REGISTERS WITH SIGN EXTEND These 8-bit shift registers have multiplexed input/output data ports to accomplish full 8-bit data handling in a single 20-pin package. Serial data may enter the shift-right register through either D0 or D1 inputs as selected by the

74LS322A

Abstract: SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS322A 8-BIT SHIFT REGISTERS WITH SIGN EXTEND These 8-bit shift registers have multiplexed input/output data ports to accomplish full 8-bit data handling in a single 20-pin package. Serial data may enter the shift-right register through either D0 or D1 inputs as selected by the

Contextual Info: MOTOROLA <& SN54/74LS322A 8-BIT SHIFT REGISTERS WITH SIGN EXTEND These 8-bit shift registers have multiplexed input/output data ports to accomplish full 8-bit data handling in a single 20-pin package. Serial data may enter the shift-right register through either DO or D1 inputs as selected by the

ttl 7432

Abstract: 7432 ttl 7432 pin configuration 7432 signetics 74LS 7432 TTL 7432 OR propagation delay 74LS32 specification and configuration logic symbol 74LS32 pin configuration and logic symbol 74LS32 pin configuration of 7432
Contextual Info: 7432, LS32, S32 Signetics Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; TA = 0°C to + 70°C

74ls32 equivalent

Abstract: IC 74LS32 SPECIFICATIONS 74LS32 fan-out ttl 7432 7432 pin configuration specifications of IC 74ls32 supply voltage
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C

ttl 7432

Abstract: 7432 pin configuration TTL 74ls LS32 7432 TTL pin configuration logic symbol 74LS32 74LS32 specification and configuration 7432 7432 signetics TTL 7432 NOT propagation delay ttl 7432 or
Contextual Info: S ig n e lics I 7 4 3 2 , LS 3 2 , S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19m A 74LS32 14ns 4.0m A 74S 32 4ns 28m A ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C

specifications of IC 7432 supply voltage

Abstract: 7432 pin configuration 7432 or gate ic IC 7432 74LS 7432 7432 ic or ic 7432 IC TTL 7432 IC 7432 for or gate Fanout value of IC 7432
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C

S-R flip flop clock

Abstract: sr flip flop PIN DIAGRAM
Contextual Info: 323 / ^ 54LS/74LS323 Olb CO NNECTIO N DIAGRAM PINOUT A -1 4 ° 8-BIT UNIVERSAL SHIFT/STO RAG E REGISTER With S ynchronous Reset and C om m on I/O Pins DESCRIPTION — The ’323 ¡s an 8-bit universal shift/storage register w ith 3state outputs. Its fu n ctio n is sim ilar to the ’299 with the exception of Syn­

Contextual Info: 322 I Ì 4»4LS/74LS322 I CO NNECTIO N DIAGRAM PINOUT A o ^ 8-BIT SERIAL/PARALLEL REGISTER (With Sign Extend DESCRIPTION — The ’322 is an 8-bit shift register w ith provision for either serial or parallel loading and with 3-state parallel outputs plus a bi-state serial

74LS323

Abstract: 8 shift register by using D flip-flop truth table NOT gate 74 74LS299 SN54LSXXXJ SN74LSXXXN 74LS299 APPLICATIONS
Contextual Info: SN54/74LS323 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The SN54 / 74LS323 is an 8-Bit Universal Shift / Storage Register with 3-state outputs. Its function is similar to the SN54 / 74LS299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are

74LS32

Abstract: 74LS299 74LS323 SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS323 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The SN54 / 74LS323 is an 8-Bit Universal Shift / Storage Register with 3-state outputs. Its function is similar to the SN54 / 74LS299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are

74LS32 function table

Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input OR gates. It performs the Boolean functions V = Â • B or Y = A + B in positive logic. Vcc 14 4B 13 4A 12 4Y 11 38 10 3A 3Y 9 8 [¿-I

so 54 t

Abstract: 74LS299 APPLICATIONS
Contextual Info: M MOTOROLA SN54/74LS323 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The S N 54/74LS 323 is an 8-Bit Universal S hift/S torage Register with 3-state outputs. Its function is sim ilar to the SN 54/74LS 299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are

54LS322A

Abstract: 54LS322
Contextual Info: SN 54LS322A, SN 74LS322A 8-BIT SHIFT REGISTERS WITH SIGN EXTEND D 2 4 1 1 , OCTOBER 1 9 7 7 - Multiplexed Inputs/Outputs Provide Improved Bit Density REVISED M A R C H 1 9 8 8 S N 54L S 322A . . . J OR W PACKAGE S N 74L S 322A . . . D W OR N PACKAGE {T O P V IE W

74aLS808

Abstract: 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers
Contextual Info: ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS FUNCTION DEVICE AS1032 ALS1034 AS1034 Quad 2-Input OR Buffers/ Drivers A VAILABILITY NOW NOW NOW Hex Drivers NOW ALS1035 Hex Buffers with D-C Outputs NOW AS1036 Quad 2-Input NOR Line Driver NOW ALS1240

MIN35F

Contextual Info: 54LS/74LS323 Preliminary data DESCRIPTION FEATURES The “ 323" is an 8-Bit B idirectional Universal S h ift/S to r a g e R e g is te r w ith a 3 - s ta te bidirectional Input/O utput port. The re gister has four operating modes: shift right, shift left, parallel load, and hold (do nothing). The

epf8282alc

Abstract: 74ls32 altera flex10k 8count macrofunction maxplus2 pm lib 8count Altera 8count
Contextual Info: MENTOR GRAPHICS SOFTWARE ® & MAX+PLUS INTERFACE GUIDE ® II Introduction Mentor Graphics design tools and the Altera¨ MAX+PLUS¨ II development software together provide a complete and integrated programmable logic design environment for the Sun SPARCstation and HP 9000 Series 700

CI 74LS08

Abstract: Altera lpm 8count CI 74LS32 8mcomp 74LS32 Altera lpm lib 8count CI 74LS86 maxplus2 pm lib 8count 74LS161 74LS86
Contextual Info: MENTOR GRAPHICS SOFTWARE ® & MAX+PLUS INTERFACE GUIDE ® II Introduction Mentor Graphics design tools and the Altera MAX+PLUS II development software together provide a complete and integrated programmable logic design environment for the Sun SPARCstation and HP 9000 Series 700

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

Contextual Info: Am25LS23 Am25LS23 8-Bit Shift/Storage Register with Synchronous Clear DISTINCTIVE CHARACTERISTICS • Synchronous dear • Three-state outputs • Common input/output pins Cascadable shifting Second sourced by T.l. as 54LS/74LS323 GENERAL DESCRIPTION The Am25LS23 is an 8-bit universal shift/storage register

AM25LS23PC

Abstract: 74LS323 pin configuration am25ls23 SO-332
Contextual Info: Am25LS23 Am25LS23 8-Bit Shift/Storage Register with Synchronous Clear DISTINCTIVE CHARACTERISTICS • • • Cascadable shifting Second sourced by T.l. as 54LS/74LS323 Synchronous clear Three-state outputs Common input/output pins GENERAL DESCRIPTION The Am25LS23 is an 8-bit universal shift/storage register

pin configuration logic symbol 74LS32

Abstract: pin configuration of ic 74ls32 IC PIN CONFIGURATION OF 74LS32
Contextual Info: MITSUBISHI HIGH S P E E D CMOS M 74H C 32P /FP /D P QUADRUPLE 2-INPUT P O S IT IV E OR GATE DESCRIPTION The M 74H C 32 is a sem iconductor integrated circuit con­ PIN CONFIGURATION TOP VIEW sisting of four 2-input po sitive -lo g ic OR gates, usable as