J20.C PACKAGE Search Results

J201

Contextual Info: PACKAGE INFORMATION Micrel 20 LEAD PLCC J20-1 Rev. 00 Rev.: C 1 Amendment: 0 Issue Date: July, 1999

Contextual Info: Hermetic Packages for Integrated Circuits Ceramic Leadless Chip Carrier Packages CLCC J20.C MIL-STD-1835 CQCC3-N20 (C-13) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45o E3 B E h x 45o 0.010 S E F S A A1 PLANE 2 PLANE 1 -E-

CQCC1-N20

Abstract: ne55 CERAMIC LEADLESS CHIP CARRIER
Contextual Info: Hermetic Packages for Integrated Circuits Ceramic Leadless Chip Carrier Packages CLCC J20.A MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE 0.010 S E H S D INCHES D3 j x 45o E3 B E h x 45o 0.010 S E F S A PLANE 2 PLANE 1 -E- MIN

max703mja

Abstract: LCC-28 OP07P OP-07P TRUE RMS-TO-DC CONVERTER MX7502SQ IH5048
Contextual Info: SCOPE: QUAD, SPST, CMOS, TTL-Compatible Analog Switches Device Type: -01 -02 Generic Number: DG308AA x /883B DG309A(x)/883B Case Outline(s). Outline Letter Mil-Std-1835 K GDIP1-T16 or CDIP2-T16 Case Outline 16 LEAD CERDIP Package Code J16 Absolute Maximum Ratings

OP07P

Abstract: OP-07P L7667mja max3912 IH514851 max703mja IH5341MTW MX7502SQ IH5048
Contextual Info: SCOPE: HIGH VOLTAGE, FAULT PROTECTED, ANALOG MULTIPLEXER Device Type 01 02 Generic Number MAX378M x /883B MAX379M(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter JE LP Case Outline Package Code

Contextual Info: SCOPE: CMOS DUAL 12-BIT DOUBLE-BUFFERED µP-COMPATIBLE DAC Device Type 01 02 Generic Number MX7549S x /883B MX7549T(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter Q E Case Outline Package Code

Contextual Info: Commercial INC. PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible — Programs with standard 16V8 JEDEC file — 20-pin DIP, SOIC, and PLCC packages

Contextual Info: Commercial INC. PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible — Programs with standard 16V8 JEDEC file — 20-pin DIP, SOIC, and PLCC packages

20-PIN CERDIP

Abstract: CQCCI-N20 5962-8865002RA CDIP2-T20
Contextual Info: SCOPE: CMOS HIGHSPEED 8-BIT A/D CONVERTER WITH TRACK AND HOLD Device Type 01 02 Generic Number MX7820U x /883B MX7820T(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Case Outline Package Code Outline Letter Mil-Std-1835

5962-8780201RA

Abstract: MX7226 5962-87802012C CQCC1-N20
Contextual Info: SCOPE: QUAD, CMOS, 8-BIT D/A CONVERTER Device Type 01 Generic Number MX7226T x /883B Circuit Function DAC with 2 LSB Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Case Outline Package Code Outline Letter Mil-Std-1835

1VA120

Contextual Info: TOSHIBA MOS MEMORY PRODÜCTS TC55464P/J-20, TC55464P/J-25 TC55464P/J-35 ,_ , ID E S C R IP T IO N 1 The TC55464P/J is a 262,144 b i ts high speed s t a t i c random access memory organ ized as 65,536 words by 4 b i ts using CMOS tech n o lo g y , and operated from a s in g le 5 -v o lt supply.

C5588

Abstract: 1cb2 tc5588p
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC5588P/J-15, TC5588P/J-20, TC5588P/J-25 ¡d e s c r i p t i o n ! The TC5588P/J is a 65,536 bits high speed static random access memory organized as 8,192 words by 8 bits using CMOS technology, and operated from a single 5-vblt supply.

TC55465P

Abstract: 74c74
Contextual Info: TC55465P/J—17, TC55465P/J-20 T P c c a G c m I o c T P c o i e c 65,536 WORD X 4 BIT CMOS STATIC RAM DESCRIPTION The TC55465P/J is a 262,144 bits high speed static random access memory organized as 65,536 words by 4 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS

912BI

Contextual Info: TOSHIBA NIOS MEMORY PRODUCTS TC55329P/J-20, TC55329P/J-25 TC55329P/J-35 DESCRIPTION The TC55329P/J is a 294,912 b i t s high speed s t a tic random access memory organ ized as 32,768 words by 9 b i t s using CMOS technolo gy, and operated from a s in g le 5 -v o lt supply.

c0ee

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC55417P/J-20, TC55417P/J-25, TC55417P/J-35 [d e s c r i p t i o n ! The TC55417P/J is a 65,536 bit high speed static random access memory organized as 16,384 words by 4 bits using CMOS technology, and operated from a single 5-volt supply.

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC55465P/J-20, TC55465P/J-25 TC55465P/J-35 ¡d e s c r ip t io n ] The TC55465P/J is a 262,144 b i t s high speed s t a t i c random ac c e ss memory organ ized as 65,536 words by 4 b i t s using CMOS tech n o lo g y , and operated from a s in g le 5 -v o lt supply.

Contextual Info: 6 5 ,5 36 W O R D x 4 BIT CM O S STA TIC RAM D ESCRIPTIO N The TC55465P/J is a 262,144 bits high speed static random access memory organized as 65,536 words by 4 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS technology and advanced circuit form provide high speed feature.

Contextual Info: 29P/J—17. TC55329P/J—20 29P/J—25, TC55329P/J—35 3 2 ,7 6 8 W O R D x 9 BIT C M O S STATIC R A M DESCRIPTION The TC55329P/J is a 294,912 bits high speed static random access memory organized as 32,768 words by 9 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba’» CMOS

TC55B8128J

Abstract: TC55B8128P
Contextual Info: 131,072 W O R D x 8 BIT BiCM OS STATIC RAM PRELIM INARY DESCRIPTION The TC55B8128P/J is a 1,048,576 bits high speed static random access memory organized as 131,072 words by 8 bits using BiCMOS technology, and operated from a single 5-volt supply. Toshiba's

lt928

Abstract: 55328P TC55328J
Contextual Info: 3 2 ,7 6 8 W O R D x 8 B IT C M O S S TA TIC R A M D E S C R IP T IO N The TC55328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS

TC55328P

Contextual Info: 32,768 W O R D x 8 BIT C M O S ST ATIC R A M D E SC R IP T IO N The TC55328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS technology and advanced circuit form provide high speed feature.

J20CA

Contextual Info: 262,144 W O R D x 4 BIT B iC M O S STATIC R A M P R E L IM IN A R Y D E SC R IP T IO N The TC55B4256P/J is a 1,043,576 bits high speed static random access memory organized as 262,144 words by 4 bits using BiCMOS technology, and operated from a single 5-volt supply. Toshiba's

OPA341

Abstract: 04022F104Z7B20D 0402YD333KAT2A CDC7005 DB-25P-PCB J27-15
Contextual Info: CDC7005 BGA Package Evaluation Module Manual High Performance Analog/CDC User’s Guide 2005 Clock Drivers SCAU005D IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue

Contextual Info: SCOPE: CMOS, 12-BIT BUFFERED, MULTIPLYING D/A CONVERTER Device Type 01 02 03 04 Generic Number MX7545S x /883B MX7545T(x)/883B MX7545U(x)/883B MX7545GU(x)/883B Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows: Outline Letter