INTEL MICROPROCESSOR 32 BIT PIN DIAGRAM Search Results

386SX CIRCUIT diagram

Abstract: i386SX
Contextual Info: A m 386 S X ^ Advanced Micro Devices High-Performance, 32-Bit Microprocessor with 16-Bit Data Bus DISTINCTIVE CHARACTERISTICS • Com patible with 386SX system s and software ■ 25- and 20-M Hz operating speeds ■ Pin-for-pin replacem ent of the Intel I386SX

Contextual Info: DATA S H E E T M AY 1999 Revision 2.1 LXP710 HDSL Framer/Mapper for 1168 kbps Applications General Description The LXP710 is a complete HDSL framer/mapper that multiplexes and demultiplexes a framed or unframed 2.048 Mbps E l data stream onto two 1168 kbps H DSL lines. The LXP710 also

Intel overdrive

Contextual Info: in t e i Intel486 SX M ICROPROCESSOR IM PORTANT— Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes the Intel486 SX microprocessor, the Intel OverDrive™ Processor, and the l n t e l 4 8 7 TM S X Math Coprocessor. All normal text describes the functionality for the Intel486 SX microproces­

Intel i860

Contextual Info: INTEL CORP UP/PRPHLS bflE » • 4ñ2bl7S Dia^flSb in te i i860 XR 64-BIT MICROPROCESSOR ■ Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per

Intel 8081

Abstract: 8051 Read Write for 80c188 80C188 I960 XRT82L24A XRT82L24AIV encoder line driver
Contextual Info: áç XRT82L24A QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR AUGUST 2004 REV. 1.1.2 GENERAL DESCRIPTION • Per-channel transmit power shutdown The XRT82L24A is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)

prbs pattern generator

Abstract: 7seg5 XRT83VSH28 XRT83VSH28IB
Contextual Info: XRT83VSH28 PRELIMINARY 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT AUGUST 2006 REV. P1.0.0 GENERAL DESCRIPTION The on-chip clock synthesizer generates an E1 clock reference. The XRT83VSH28 is a fully integrated 8-channel short-haul line interface unit LIU that operates from

Intel 8081

Abstract: intel 80c188 users manual rur 450
Contextual Info: áç XRT82L24A QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR AUGUST 2004 REV. 1.1.2 GENERAL DESCRIPTION • Per-channel transmit power shutdown The XRT82L24A is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)

Contextual Info: 80960JS/JC 3.3 V Microprocessor Advance Information Datasheet Product Features • Pin/Code Compatible with all 80960Jx Processors ■ High-Performance Embedded Architecture — One Instruction/Clock Execution — Core Clock Rate is: 80960JS lx the Bus Clock

8Khz Oscillator

Abstract: AFM2 PQFP160 ST10 STLC5465B 80C186 80C188
Contextual Info: STLC5465B MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED . . . . . . . . . . . . . 32 TxHDLCs WITH BROADCASTING CAPABILITY AND/OR CSMA/CR FUNCTION WITH AUTOMATIC RESTART IN CASE OF TX FRAME ABORT 32 RxHDLCs INCLUDING ADDRESS RECOGNITION 16 COMMAND/INDICATE CHANNELS 4 OR

1H-01

Abstract: XRT83VSH314 XRT83VSH314IB 75E11
Contextual Info: XRT83VSH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT SEPTEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH314 is a fully integrated 14-channel short-haul line interface unit (LIU) that operates from

Contextual Info: INTEL CORP -CUP/PRPHLS} b7E D • 402^175 OlEbMll in t ^ l Intel386 SX MICROPROCESSOR ■ Full 32-Bit Internal Architecture — 8-, 16-, 32-Bit Data Types — 8 General Purpose 32-Bit Registers ■ Runs ln t e l3 8 6 TM Software in a Cost Effective 16-Bit Hardware Environment

CD 2399 GP

Abstract: 80387 DX Users Manual Programmers Reference
Contextual Info: PRByBJOODOÂIfflr in t e i Intel486 DX MICROPROCESSOR 168-Pin Grid Array Package High Performance Design — RISC Integer Core with Frequent Instructions Executing in One Clock — 25 MHz, 33 MHz, and 50 MHz Clock — 80, 106, 160 Mbyte/sec Burst Bus — CHMOS IV and CHMOS V Process

Contextual Info: xr XRT83SH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT JULY 2005 REV. 1.0.2 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS/PRBS generation/detection, TAOS, DMO, and diagnostic loopback modes.

dmo 365 r

Abstract: dmo 365 isolation transformer TX15 xn03 xn06 850C XRT83VSH316 XRT83VSH316IB
Contextual Info: XRT83VSH316 PRELIMINARY 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT JULY 2007 REV. P1.0.3 GENERAL DESCRIPTION for external timing 8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1 . The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from

Contextual Info: áç XRT83SL34 PRELIMINARY QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JANUARY 2003 REV. P1.0.6 GENERAL DESCRIPTION The XRT83SL34 is a fully integrated Quad four channel short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω, or

8051 example programs

Contextual Info: áç XRT83L38 PRELIMINARY OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR SEPTEMBER 2001 REV. P1.1.1 GENERAL DESCRIPTION The XRT83L38 is a fully integrated Octal eight channels long-haul and short-haul line interface unit for T1(1.544Mbps) 100Ω, E1(2.048Mbps) 75Ω or 120Ω

EQC3

Contextual Info: áç XRT83L38 PRELIMINARY OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR AUGUST 2001 REV. P1.1.0 GENERAL DESCRIPTION The XRT83L38 is a fully integrated Octal eight channels long-haul and short-haul line interface unit for T1(1.544Mbps) 100Ω, E1(2.048Mbps) 75Ω or 120Ω

Contextual Info: GEC PLESSEY j S E M I C O N D U C T O R S | C10402FDS-1-1 MA818 THREE-PHASE PULSE WIDTH MODULATION WAVEFORM GENERATOR The MA818 PWM generator has been designed to provide waveforms for the control of variable speed AC

32H4631

Contextual Info: SSI 32C9023 ¿ikon s y s t e m s A TDK Group/Company SCSI Combo Controller 80 Mbit/s; dual bit NRZ interface Preliminary Data January 1995 DESCRIPTION FEATURES The SSI 32C9023 is an advanced CMOS VLSI device which integrates major portions of the hardware needed

XRT83SL314

Abstract: XRT83SL314IB
Contextual Info: xr XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT MARCH 2005 REV. 1.0.1 GENERAL DESCRIPTION Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS generation/ detection, Network Loop Code generation/detection, TAOS, DMO, and diagnostic loopback modes.

Contextual Info: in te * MILITARY i860 64-BIT MICROPROCESSOR Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for

Contextual Info: XRT83L38 PRELIMINARY OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR OCTOBER 2003 REV. P1.3.6 GENERAL DESCRIPTION The XRT83L38 is a fully integrated Octal eight channel long-haul and short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or

MAX4852

Abstract: intel 82533
Contextual Info: SSI 32C9022 W M M k f f lS SCSI Combo Controller 48 Mbit/s; dual bit NRZ interface ' A TDK Group/Company Preliminary Data January 1995 DESCRIPTION FEATURES The SSI 32C9022 is an advanced CMOS VLSI device which integrates major portions of the hardware needed

rneg2

Abstract: 104H2 TA5 series transformer
Contextual Info: áç XRT83SL38 PRELIMINARY OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR FEBRUARY 2003 REV. P1.0.8 GENERAL DESCRIPTION The XRT83SL38 is a fully integrated Octal eight channel short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω, or