INTEL AT 89 INSTRUCTION SET Search Results

Contextual Info: ADVANCE INFORMATION in te i 8XC151 SA/SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER Commercial/Express MCSi 51 Microcontroller Compatible Instruction Set Pin Compatible with 44-lead PLCC and 40-lead PDIP MCS 51 Sockets Fast Instruction Pipeline 16-bit Internal Code Fetch

KU80486SX

Abstract: 240486 KU80486SXSA33 ku80486 272769 240950 A80486SXSA33 SL ENHANCED I486 D1542 a80486sx
Contextual Info: Embedded Intel486 SX Processor Datasheet Product Features • ■ ■ ■ ■ 32-Bit RISC Technology Core 8-Kbyte Write-Through Cache Four Internal Write Buffers Burst Bus Cycles Dynamic Bus Sizing for 8- and 16-bit Data Bus Devices SL Technology ■ ■

Contextual Info: 5hE D • M fl2bl7S INTEL 011M07S CORP 402 ■ IT L 1 U P/PR PH LS 80960KA EMBEDDED 32-BIT PROCESSOR ■ Built-In Interrupt Controller — 32 Priority Levels 256 Vectors — 3.4 jlis Latency @ 25 MHz _ Easy to Use, High Bandwidth 32-Bit Bus — 66.7 Mbytes/s Burst

INTELDX4 write-through

Abstract: 242202
Contextual Info: in t e i EMBEDDED WRITE-BACK ENHANCED lntelDX4 PROCESSOR Up to 100 MHz Operation Data Bus Parity Generation and Checking Integrated Floating-Point Unit Speed-Multiplying Technology Boundary Scan JTAG 32-Bit RISC Technology Core 3.3-Volt Processor, 75 MHz, 25 MHz

Contextual Info: M S W A M G IS O M F C Q M Ä Y I M Intel386 SXSA EMBEDDED MICROPROCESSOR • Static lntel3 8 6 TM CPU Core — Low Power Consumption — Operating Power Supply 4.5V to 5.5V— 25 MHz and 33 MHz 4.75V to 5.25V— 40 MHz — Operating Frequency SA-40 = 40 MHz

Contextual Info: 8XC196NU COMMERCIAL CHMOS 16-BIT MICROCONTROLLER 1.0 PRODUCT OVERVIEW The 8XC196NU is a member of Intel’s 16-bit MCS 96 microcontroller family. The device features 1 Mbyte of linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch

Contextual Info: intei 1.0 8x€196EA — AUTOMOTIVE PRODUCT OVERVIEW Figure 1. SxCISSEA B lock Diagram The SxCISSEA is highly integrated with an enhanced peripheral set. The serial debug unit SDU provides system debug and development capabilities. The SDU can set a single hardware breakpoint and provides

LSI403LP

Contextual Info: Preliminary – Content Subject to Change LSI403LP Digital Signal Processor Preliminary Datasheet The LSI403LP is a 16-bit, fixed-point digital signal processor DSP based on the ZSP 400 DSP core. The LSI403LP contains an entire DSP system on a single chip, and is designed for applications requiring lower

Intel overdrive

Contextual Info: in t e i Intel486 SX M ICROPROCESSOR IM PORTANT— Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes the Intel486 SX microprocessor, the Intel OverDrive™ Processor, and the l n t e l 4 8 7 TM S X Math Coprocessor. All normal text describes the functionality for the Intel486 SX microproces­

Contextual Info: Ì3C 196E A — A U T O M O T IV E 1.0 PRODUCT OVERVIEW Figure 1. 83C19SEA Block Diagram The S3C198EA is highly integrated with an enhanced peripheral set. The serial debug unit SDU provides system debug and development capabilities. The SDU can set a single hardware breakpoint and provides

Contextual Info: AflJWAKKSE OKJF KBKüÄTD@M Intel386 CXSA EMBEDDED MICROPROCESSOR • Static Intel386™ CPU Core — Low Power Consumption — Operating Power Supply 4.5V to 5.5V—25 MHz and 33 MHz 4.75V to 5.25V—40 MHz — Operating Frequency SA-40 = 40 MHz SA-33 = 33 MHz

Contextual Info: ^ ^ Data Sheet October 1994 Microelectronics DSP1611 Digital Signal Processor 1. Features • IEEE P1149.1 test port JTAG with boundary scan ■ ■ Full-speed in-circuit emulation hardware on-chip Optimized for digital cellular applications with a bit manipulation unit for higher signal coding

27-0780-00

Contextual Info: INTEL CORP UP/PRPHLS bflE D Bi MflHblTS O l S i n B 433 intgl 80C196KB10/83C196KB10/80C196KB12/83C196KB12 COMMERCIAL/EXPRESS CHMOS MICROCONTROLLER 83C196KB — 8 Kbytes o f Factory Mask-Program m ed ROM 80C196KB — ROMIess • 8 Kbytes of On-Chip ROM Available

Contextual Info: intel APPENDIX A INSTRUCTION SET REFERENCE This appendix provides reference information for the instruction set of the family of MCS 96 microcontrollers. It defines the processor status word PSW flags, describes each instruction, shows the relationships between instructions and PSW flags, and shows hexadecimal opcodes,

80960JA

Abstract: 80960JD 80960JF A80L960JA intel packaging handbook 240800
Contextual Info: A PRELIMINARY 80L960JA/JF 3.3 V EMBEDDED 32-BIT MICROPROCESSOR • ■ ■ ■ ■ ■ • 3.3 Volt Version of the 80960JA/JF Processor Pin/Code Compatible with all 80960Jx ■ High Bandwidth Burst Bus Processors — 32-Bit Multiplexed Address/Data — Programmable Memory Configuration

Contextual Info: 80960JD 1.0 PURPOSE This document contains preview inform ation for the 80960JD microprocessor, including electrical characteristics and package pinout information. Detailed functional descriptions — other than param etric perform ance — are published in the

WJ972MA4

Abstract: B3814-02 LXT971A line code MLT b347 10BT LXT972M 302875 line code MLT-3 "network interface cards"
Contextual Info: Intel LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet The Intel® LXT972M Single-Port 10/100 Mbps PHY Transceiver is an IEEE compliant Fast Ethernet PHY Transceiver that directly supports both 100BASE-TX and 10BASE-T applications. It provides a Media Independent Interface MII for easy attachment to 10/100 Media Access

Contextual Info: PENTIUM II XEON PROCESSOR AT 400 MHZ • Binary compatible with applications running on previous members of the Intel microprocessor family ■ Optimized for 32-bit applications running on advanced 32-bit operating systems ■ ■ ■ Single Edge Contact S.E.C. cartridge

Contextual Info: CY7C1380D, CY7C1380F CY7C1382D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 167 MHz ■ Registered inputs and outputs for pipelined operation

80296SA

Contextual Info: 80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER 1.0 PRODUCT OVERVIEW The 80296SA is a member of Intel’s 16-bit MCS 96 microcontroller family. The 80296SA features 6 Mbytes of linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch

7655a

Abstract: CD2481 CL-CD2231 CL-CD2401 CL-CD2431 CL-CD2481 3C3EW CD240 BW-190
Contextual Info: CL-CD2481 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on

Contextual Info: ¡ n f j P R iy M O B M M S V 8XC51FX CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS Commercial/Express ‘ See Table 1 for Proliferation Options High Performance CHMOS EPROM/ROM/CPU 7 Interrupt Sources 24 MHz Internal Operation -3 only

Contextual Info: TOSHIBA Original CMOS 8-Bit Microcontroller TLCS-870/C Series TMP86FM25FG Semiconductor Company TMP86FM25 Document Change Notification The purpose of this notification is to inform customers about the launch of the Pb-free version of the device. The introduction of a Pb-free replacement affects the datasheet. Please understand that this

Contextual Info: A E M Ä N ] ! DMF©[^G!Mini K] in t e l 8XC196NU COMMERCIAL CHMOS 16-BIT MICROCONTROLLER Chip-select Unit — 6 Chip-select Pins — Dynamic Demultiplexed/Multiplexed Address/Data Bus for Each Chip Select — Programmable Wait States 0-15 for Each Chip Select