IEEE BUS DATA 6 Search Results

BGA-120P-M01

Abstract: LQFP-100 MB86615 MB86615PBT MB86615PFV D1343
Contextual Info: To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS04-22002-1E ASSP Communication Control IEEE 1394 Bus Controller for DVC MB86615 • DESCRIPTION The MB86615 is 1394 serial bus controller compatible with the IEEE 1394 “FireWire” standard (IEEE Standard

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22001-1E ASSP Communication Control IEEE 1394 Bus Controller for MPEG, DVC MB86612 • DESCRIPTION The MB86612 is 1394 serial bus controller exclusively for MPEG and DVC data transfer, compatible with the IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). Two built-in ports plus a differential transceiver and

F9901

Abstract: BGA-120P-M01 LQFP-100 MB86612 MB86612PBT MB86612PFV FBGA-120
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22001-1E ASSP Communication Control IEEE 1394 Bus Controller for MPEG, DVC MB86612 • DESCRIPTION The MB86612 is 1394 serial bus controller exclusively for MPEG and DVC data transfer, compatible with the IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). Two built-in ports plus a differential transceiver and

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22001-1E ASSP Communication Control IEEE 1394 Bus Controller for MPEG, DVC MB86612 • DESCRIPTION The MB86612 is 1394 serial bus controller exclusively for MPEG and DVC data transfer, compatible with the IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). Two built-in ports plus a differential transceiver and

TS111

Abstract: TS012 Ts142 ts191 TS201
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22005-1E ASSP Communication Control IEEE1394-SCSI Tailgate MB86616 • DESCRIPTION The MB86616 is the LSI for protocol conversion to connect SCSI devices to the IEEE 1394 bus. This LSI integrates a 1394 controller compliant with the IEEE Standard for High Performance Serial Bus IEEE Std. 1394-1995, or

BGA-120P-M01

Abstract: LQFP-100 MB86615 MB86615PBT MB86615PFV
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22002-1E ASSP Communication Control IEEE 1394 Bus Controller for DVC MB86615 • DESCRIPTION The MB86615 is 1394 serial bus controller compatible with the IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). One built-in port plus a differential transceiver and comparator are provided to enable formation of

DS04-22002-1E

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22002-1E ASSP Communication Control IEEE 1394 Bus Controller for DVC MB86615 • DESCRIPTION The MB86615 is 1394 serial bus controller compatible with the IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). One built-in port plus a differential transceiver and comparator are provided to enable formation of

TS-162

Abstract: ts232 TS015 Code A08 RF Semiconductor ts074 FPT-144P-M08 VSP400 002120 TS016 tdk ts105
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22005-1E ASSP Communication Control IEEE1394-SCSI Tailgate MB86616 • DESCRIPTION The MB86616 is the LSI for protocol conversion to connect SCSI devices to the IEEE 1394 bus. This LSI integrates a 1394 controller compliant with the IEEE Standard for High Performance Serial Bus IEEE Std. 1394-1995, or

TSB12C01A

Abstract: TSB12C01AMWNB
Contextual Info: TSB12C01AM IEEE 1394-1995 HIGH-SPEED SERIAL-BUS LINK-LAYER CONTROLLER SGLS088 – MARCH 1996 D D Link – Complies With High-Speed IEEE 1394–1995 Serial Bus Standard – Transmits and Receives Correctly Formatted 1394 Packets – Supports Isochronous Data Transfer

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET A SSP DS04-22002-1E Communication Control IEEE 1394 Bus Controller for DVC MB86615 • DESCRIPTION The MB86615 is 1394 serial bus controller compatible with the IEEE 1394 “ FireWire” standard (IEEE Standard 1394-1995). One built-in port plus a differential transceiver and comparator are provided to enable formation of

FW802A

Abstract: FW802A-DB S100 S200 S400
Contextual Info: Data Sheet, Rev. 3 June 2001 FW802A Low-Power PHY IEEE* 1394A-2000 Two-Cable Transceiver/Arbiter Device Distinguishing Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Compliant with IEEE Standard 1394a-2000, IEEE Standard for a High Performance Serial Bus

SCAN921023

Abstract: SCAN921023SLC SCAN921224 SCAN921224SLC SCANSTA111
Contextual Info: SCAN921023 and SCAN921224 20-66 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 JTAG and at-speed BIST General Description The SCAN921023 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The

Contextual Info: TSB12LV26 OHCIĆLynx PCIĆBased IEEE 1394 Host Controller Data Manual 2000 Bus Solutions Printed in U.S.A., 03/00 SLLS366A TSB12LV26 OHCI-Lynx PCI-Based IEEE 1394 Host Controller Data Manual Literature Number: SLLS366A March 2000 Printed on Recycled Paper

ANA 608

Abstract: CL 6017 monitor cable diagram AGERE 1394 IEEE 1394 cable 4 to 4 FW802B FW802B-DB L-FW802B-DB S100 S200
Contextual Info: Data Sheet, Rev. 3 May 2004 FW802B Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device Distinguishing Features • ■ ■ Compliant with IEEE Standard 1394a-2000, IEEE Standard for a High Performance Serial Bus Amendment 1. Low-power consumption during powerdown or

TSB11C01

Abstract: TSB11LV01 TSB12C01A TSB14C01 TSB21LV03
Contextual Info: TSB12C01A IEEE 1394Ć1995 HighĆSpeed SerialĆBus LinkĆLayer Controller Data Manual 1997 Mixed-Signal Products Printed in U.S.A. 03/97 SLLS219A TSB12C01A Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller SLLS219A February 1997 Printed on Recycled Paper

TSB11C01

Abstract: TSB11LV01 TSB12C01A TSB14C01 TSB21LV03
Contextual Info: TSB12C01A IEEE 1394Ć1995 HighĆSpeed SerialĆBus LinkĆLayer Controller Data Manual 1997 Mixed-Signal Products Printed in U.S.A. 03/97 SLLS219A TSB12C01A Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller SLLS219A February 1997 Printed on Recycled Paper

MC68488

Abstract: MC3447
Contextual Info: MOTOROLA MC3447 SEMICONDUCTOR TECHNICAL DATA BIDIRECTIONAL INSTRUMENTATION BUS GRIB TRANSCEIVER This bidirectional bus transceiver is intended as the interface between TTL or MOS logic and the IEEE Standard Instrumentation Bus (488-1978, often referred to as GPIB). The required bus ter­

BGA-176P-M02

Abstract: FBGA176 FBGA-176 FPT-144P-M08 LQFP144 LQFP-144 MB86613 S100 S200 S400
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22004-1E ASSP Communication Control IEEE 1394 Open HCI Controller MB86613 • DESCRIPTION The MB86613 a high-performance, host-bus PCI and serial-bus (1394) controller chip for controlling transfer between the PCI and 1394 buses. This chip conforms to the PCI Standard Version 2.1 for PCI control, the IEEE

ad2410

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS04-22004-1E ASSP Communication Control IEEE 1394 Open HCI Controller MB86613 • DESCRIPTION The MB86613 a high-performance, host-bus PCI and serial-bus (1394) controller chip for controlling transfer between the PCI and 1394 buses. This chip conforms to the PCI Standard Version 2.1 for PCI control, the IEEE

F9901

Abstract: BGA-120P-M01 LQFP-100 MB86612 MB86612PBT MB86612PFV
Contextual Info: To Top / Lineup / Index FUJITSU SEMICONDUCTOR DATA SHEET DS04-22001-1E ASSP Communication Control IEEE 1394 Bus Controller for MPEG, DVC MB86612 • DESCRIPTION The MB86612 is 1394 serial bus controller exclusively for MPEG and DVC data transfer, compatible with the

Contextual Info: SCAN921025 and SCAN921226 30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 JTAG and at-speed BIST General Description The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The

6 pins IC cbe

Abstract: irca
Contextual Info: S VlïlBl OS D a ta S h eet SYMI3FW600 PCI to IEEE-1394 Host Bus Interface T he SYM13FW600 chip uses the Link Layer protocol o f the IEEE-1394 serial bus. It also provides direct m em o ry access DM A engines for h igh-perform ance data transfer an d a P eripheral

VTL 10D2

Contextual Info: OBSOLETE October 24, 2011 30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 JTAG and at-speed BIST General Description The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The SCAN921226

286 dram schematic

Abstract: EACO STM A0322
Contextual Info: TI380C27 DUAL-PROTOCOL C0MMPR0CESS0R SPWS014A - APRIL 1994 - REVISED MARCH 1995 I * IEEE 802.5 and IBM Token-Ring Network Compatible • Adapter Local-Bus Speed Is Switchable Between 4 MHz and 6 MHz • 80x8x or 68xxx-Type Bus and Memory Organization - 8- or 16-Bit Data Bus on 80x8x Buses