IDT PACKAGE STANDARD MARKING Search Results

C12H5Br5O

Contextual Info: DESIGN TARGET ICS854S44I DIFFERENTIAL TRANSLATOR/REPEATER GENERAL DESCRIPTION FEATURES T h e I C S 8 5 4S44 i s a high performance DifferICS ential-to-LVDS Translator a n d a m e m b e r o f t h e HiPerClockS H i Pe r C l o ck S ™fa m i l y o f H i g h Pe r fo r m a n c e

IDT package marking

Abstract: IDT CODE DATE marking IDT CODE DATE marking FORMAT stac9200x5 IDT Package Marking format IDT Package standard Marking N32E-CB1 IDT marking code assembly site date code format IDT package marking yyww
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: SG0703-03 DATE: April 2, 2007 Product Affected: See Listing in Attachment 2 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Mark

Contextual Info: ICS840I-77 77.76MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT GENERAL DESCRIPTION FEATURES The ICS840I-77 is a SONET Oscillator ReplaceICS ment and a member of the HiPerClocksTM family HiPerClockS of high perfor mance devices from IDT. The ICS840I-77 uses a 19.44MHz crystal to synthesize

Block diagram of 8-1 multiplexer design logic

Contextual Info: ICS85356I 2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL/ECL CLOCK MULTIPLEXER General Description Features The ICS85356I is a dual 2:1 Differential-to-LVPECL Multiplexer and is a member of the HiPerClockSTM HiPerClockS family of High Performance Clock Solutions from

Ics85105

Contextual Info: PRELIMINARY ICS85105I LOW SKEW, 1-TO-5, DIFFERENTIAL/ LVCMOS-TO-0.7V HCSL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS85105I is a low skew, high performance 1ICS to-5 Differential-to-0.7V HCSL Fanout Buffer and HiPerClockS a member of the HiPerClockS™ family of High

Contextual Info: DESIGN TARGET ICS854S14I LOW SKEW, 1-TO-4 DIFFERENTIAL-TOLVDS FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS854S14I is a high speed 1-to-4 DifferentialICS to-LVDS Fanout Buffer and is a member of the HiPerClockS HiPerClockS™ family of high performance clock

Contextual Info: PRELIMINARY ICS840I-77 77.76MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT GENERAL DESCRIPTION FEATURES The ICS840I-77 is a SONET Oscillator ReplaceICS ment and a member of the HiPerClocksTM family HiPerClockS of high perfor mance devices from IDT. The ICS840I-77 uses a 19.44MHz crystal to synthesize

Contextual Info: PRELIMINARY ICS85104I LOW SKEW, 1-TO-4, DIFFERENTIAL/ LVCMOS-TO-0.7V HCSL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS85104I is a low skew, high performance 1ICS to-4 Differential/LVCMOS-to-0.7V HCSL Fanout HiPerClockS Buffer and a member of the HiPerClockS™ family

ICS85104I

Abstract: ICS85104AGILF
Contextual Info: PRELIMINARY ICS85104I LOW SKEW, 1-TO-5, DIFFERENTIAL/ LVCMOS-TO-0.7V HCSL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS85104I is a low skew, high performance 1ICS to-4 Differential/LVCMOS-to-0.7V HCSL Fanout HiPerClockS Buffer and a member of the HiPerClockS™ family

ICS85356AMI

Abstract: ics85356agilf
Contextual Info: ICS85356I 2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL/ECL CLOCK MULTIPLEXER General Description Features The ICS85356I is a dual 2:1 Differential-to-LVPECL Multiplexer and is a member of the HiPerClockSTM HiPerClockS family of High Performance Clock Solutions from

IDT CODE DATE marking FORMAT

Abstract: IDT package marking IDT Package Marking format IDT CODE DATE marking assembly site date code format STAC9750XXTAEC1X STAC9767XXTAEC1X STAC9751XXTAEC1X SG0703-02 STAC9200X5TAEB1X
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: SG0703-02 DATE: Product Affected: See Listing in Attachment 2 April 2, 2007 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Mark

Contextual Info: PRELIMINARY ICS844244I-04 FEMTOCLOCKS CRYSTAL-TO-LVDS 150MHZ CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS844244I-04 is a Serial ATA SATA /Serial ICS Attached SCSI (SAS) Clock Generator and a HiPerClockS™ member of the HiPerClocks T M family of high

Contextual Info: ICS8535-01 LOW SKEW, 1-to-4 LVCMOS/LVTTL-TO3.3V LVPECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The ICS853501 has two single ended clock inputs. the single ended clock

ic 748c circuit diagram

Contextual Info: PRELIMINARY ICS85104I LOW SKEW, 1-TO-4, DIFFERENTIAL/ LVCMOS-TO-0.7V HCSL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS85104I is a low skew, high performance 1ICS to-4 Differential/LVCMOS-to-0.7V HCSL Fanout HiPerClockS Buffer and a member of the HiPerClockS™ family

Contextual Info: LVCMOS/LVTTL-TO-DIFFERENTIAL 3.3V, 2.5V LVPECL TRANSLATOR ICS85320I GENERAL DESCRIPTION FEATURES The ICS85320I is a LVCMOS / LVTTL-to-DifferenICS tial 3.3V, 2.5V LVPECL translator and a member HiPerClockS of the HiPerClocks™ family of High Performance

ICS85320AMI

Abstract: ICS85320AMIT ICS85320I ICS8532AMI 85320AIL
Contextual Info: ICS85320I LVCMOS/LVTTL-TO-DIFFERENTIAL 3.3V, 2.5V LVPECL TRANSLATOR GENERAL DESCRIPTION FEATURES The ICS85320I is a LVCMOS / LVTTL-to-DifferenICS tial 3.3V, 2.5V LVPECL translator and a member HiPerClockS of the HiPerClocks™ family of High Performance

Contextual Info: PRELIMINARY ICS873032 HIGH SPEED, ÷2, DIFFERENTIAL-TO-3.3V, 5V LVPECL/ECL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS8 73032 is a high speed, high perforICS mance Differential-to-3.3V, 5V LVPECL/ECL Clock HiPerClockS Generator and a member of the HiPerClockS ™

ICS853016

Abstract: ICS853016AM ICS853016AMT MC100EP16VCD MC100EP16VCDT MO-187 16AL
Contextual Info: PRELIMINARY ICS853016 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO3.3V, 5V LVPECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES T h e I C S 8 5 3 016 i s a l ow s kew, high perforICS mance 1-to-2 Differential-to-3.3V, 5V LVPECL/ HiPerClockS E C L Fa n o u t B u f fe r a n d a m e m b e r o f t h e

Contextual Info: ICS83948I LOW SKEW, 1-TO-12 DIFFERENTIALTO-LVCMOS/LVTTL FANOUT BUFFER General Description Features The ICS83948I is a low skew, 1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer and HiPerClockS a member of the HiPerClockS™family of High Performance Clock Solutions from IDT. The

818C

Contextual Info: PRELIMINARY ICS844242I-08 FEMTOCLOCKS CRYSTAL-TO-LVDS 75MHZ CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS844242I-08 is a Serial ATA SATA /Serial ICS Attached SCSI (SAS) Clock Generator and a HiPerClockS™ member of the HiPerClocks T M family of high

circuit diagram of 8-1 multiplexer

Abstract: ICS83058AGI ICS83058AGILF ICS83058AGILFT ICS83058AGIT ICS83058I T5A marking
Contextual Info: ICS83058I 8:1, SINGLE-ENDED MULTIPLEXER GENERAL DESCRIPTION FEATURES The ICS83058I is a low skew, 8:1, Single-ended ICS Multiplexer and a member of the HiPerClockS HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83058I has eight selectable singleended clock inputs and one single-ended clock

ICS83054AGI

Abstract: ICS83054AGILF ICS83054AGILFT ICS83054AGIT ICS83054I
Contextual Info: ICS83054I 4:1, SINGLE-ENDED MULTIPLEXER GENERAL DESCRIPTION FEATURES The ICS83054I is a low skew, 4:1, Single-ended ICS Multiplexer and a member of the HiPerClockS HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83054I has four selectable singleended clock inputs and one single-ended clock

circuit diagram of 8-1 multiplexer

Contextual Info: ICS83054I 4:1, SINGLE-ENDED MULTIPLEXER GENERAL DESCRIPTION FEATURES The ICS83054I is a low skew, 4:1, Single-ended ICS Multiplexer and a member of the HiPerClockS HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83054I has four selectable singleended clock inputs and one single-ended clock

ICS87421AMI

Abstract: ICS87421AMIFT ICS87421AMILF ICS87421I
Contextual Info: PRELIMINARY ICS87421I ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS87421I is a high perfor mance ÷1/÷2 ICS Differential-to-LVDS Clock Generator and a memHiPerClockS ber of the HiPerClockS™family of High Performance Clock Solutions from IDT. The CLK, nCLK