IC 74LCX00 TSSOP 14 Search Results

Contextual Info: s e m ic o n d u c t o r Revised September 1998 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features The LCXOO contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­

Contextual Info: S E M IC O N D U C T O R 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features The LCXOO contains lour 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface ot 5V sys­ tems to 3V systems.

TSS0P14

Abstract: 74LCX00 74LCX00M 74LCX00T lcx00
Contextual Info: 74LCX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS . 5VTOLERANT INPUTS • HIGHSPEED: tpD = 5.2 ns MAX. at Vcc = 3 V ■ POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: |Io h | = Io l = 2 4 m A (M IN ) . PCI BUS LEVELS GUARANTEED AT 24mA

Contextual Info: •M ICO N DUCTO R r 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features The LCXOO contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technol­

Contextual Info: S E M I C O N D U C T O R R e v is e d M a rc h 1 9 9 9 TM 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features T h e LCXOO c o n ta in s fo u r 2 -in p u t N A N D g a te s . T h e in p u ts • 5 V to le ra n t in p u ts

Contextual Info: S G S -T H O M S O N 74LCX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS PRELIMINARY DATA . 5V TOLERANT INPUTS . HIGHSPEED: tpD = 5.2 ns MAX. at Vcc = 3V . POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: JIoh) = Iol = 24 mA (MIN)