HSM2812 DATA SHEET Search Results

hsm2812

Abstract: ANSI-644 ADA4937-2 AN-835 TC1-1-13M IEEE-1596 TC1-1-13M equivalent murata LTE band pass filter
Contextual Info: 10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FEATURES AVDD PDWNB PDWNA DRVDD LVDS DRIVERS OR±A VIN+A Σ-Δ MODULATOR VIN–A D3±A D0±A PLL_LOCKED VREF CFILT AD9267 PLLMULT4 PLLMULT3 PLLMULT2 PHASELOCKED LOOP CLK+ CLK– DCO±

Contextual Info: 10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FUNCTIONAL BLOCK DIAGRAM FEATURES PDWNB PDWNA DRVDD LVDS DRIVERS OR±A VIN+A MODULATOR VIN–A D3±A D0±A PLL_LOCKED VREF CFILT AD9267 PLLMULT4 PLLMULT3 PLLMULT2 PHASELOCKED LOOP

Contextual Info: 16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC AD9261 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD DRVDD OR VIN+ VIN– MODULATOR LOW-PASS DECIMATION FILTER SAMPLE RATE CONVERTER CMOS BUFFER D15 D0 PLL_ LOCKED VREF PHASE LOCKED LOOP

HSM2812

Abstract: ADA4937-1 AN-835 TC1-1-13M AD9261-10EBZ
Contextual Info: 16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC AD9261 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD OR VIN+ VIN– Σ-Δ MODULATOR LOW-PASS DECIMATION FILTER SAMPLE RATE CONVERTER CMOS BUFFER D15 D0 PLL_ LOCKED VREF PHASE LOCKED

HSM2812

Abstract: AN-835 D15A
Contextual Info: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FEATURES APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE Quadrature sampling instrumentation Medical equipment

HSM2812

Abstract: 46fs 74HCT00 74LS00 clock frequency 74ACT00 74LS00 AD9446 AD9446-100 AD9446-80 walt Kester
Contextual Info: dV x Δt dt Δv VOLTAGE A Test Engineering Perspective Δv = VOLTAGE Analog-to-Digital Converter Clock Optimization: Δv By Rob Reeder, Wayne Green, and Robert Shillito System clock optimization can be both challenging and rewarding. It may be relatively easy to design an analog-to-digital converter

Contextual Info: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE Quadrature sampling instrumentation

Contextual Info: Radar Receive Path AFE: 6-Channel LNA/PGA/AAF with ADC AD8283 Data Sheet INA– INB+ INB– PGA AAF LNA PGA AAF LNA PGA AAF LNA PGA AAF RBIAS LNA VREF AAF DVDD33x PGA DVDD18x LNA MUXA AAF PDWN PGA REFERENCE DSYNC INC+ INC– MUX IND+ IND– INE+ INE– INF+

6 pin pulse transformer 4503 circuit diagram

Abstract: pulse transformer 4503 pulse transformer 4503 6 pin hsm2812
Contextual Info: 12-Bit, 370 MSPS/500 MSPS, 1.8 V Analog-to-Digital Converter AD9434 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9434 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 12 OUTPUT 12 STAGING LVDS CLOCK MANAGEMENT

Contextual Info: Octal, 14-Bit, 50 MSPS, Serial LVDS, 1.8 V ADC AD9252 Data Sheet FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers

AD9467

Abstract: B0205F5050A00 AD520* differential amplifier
Contextual Info: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter Excellent linearity at 250 MSPS

Contextual Info: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet FUNCTIONAL BLOCK DIAGRAM 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter

AD9467

Contextual Info: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet FUNCTIONAL BLOCK DIAGRAM 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter

HSM2812

Abstract: AD9102-EBZ ultrasound transducer circuit driver CALSE chip for generating 10 Mhz sine wave TXDAC DDS-60 Rev A
Contextual Info: Low Power, 14-Bit, 180 MSPS, Digital-to-Analog Converter and Waveform Generator AD9102 Data Sheet FEATURES The DDS is a 14-bit output, up to 180 MSPS master clock sine wave generator with a 24-bit tuning word, allowing 10.8 Hz/LSB frequency resolution. On-chip 4096 x 14-bit pattern memory

6 pin pulse transformer 4503 circuit diagram

Abstract: pulse transformer 4503 111 pulse transformer 4503 pulse transformer 4503 with 3 pins
Contextual Info: 8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter AD9484 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9484 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 8 OUTPUT STAGING LVDS CLOCK MANAGEMENT 8 D7± TO D0± OR+ OR–

6 pin pulse transformer 4503 circuit diagram

Abstract: pulse transformer 4503 111 pulse transformer 4503 6 pin pulse transformer 4503 pulse transformer 4503 with 3 pins
Contextual Info: 8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter AD9484 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9484 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 8 OUTPUT STAGING LVDS CLOCK MANAGEMENT 8 D7± TO D0± OR+ OR–

Contextual Info: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Preliminary Technical Data 75.5 dBFS SNR to 170 MHz at 250 MSPS @ 2.5 V p-p FS 74 dBFS SNR to 170 MHz at 250 MSPS @ 2.0 V p-p FS 90 dBFS SFDR to 300 MHz at 250 MSPS @ −1 dBFS at 2.5 V p-p FS

Contextual Info: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter AD9230-11 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD AD9230-11 REFERENCE CML DRVDD DRGND VIN+ VIN– TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT STAGING LVDS CLOCK MANAGEMENT 11 D10 TO D0

AD9230BCPZ11-200

Abstract: hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 ANSI-644 AD923011-200EBZ
Contextual Info: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter AD9230-11 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD AD9230-11 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT STAGING LVDS CLOCK MANAGEMENT 11 D10 TO D0

HSM2812

Abstract: ANALOG DEVICES ad9106
Contextual Info: Quad, Low Power, 12-Bit, 180 MSPS, Digital-toAnalog Converter and Waveform Generator AD9106 Data Sheet FEATURES GENERAL DESCRIPTION Highly integrated quad DAC On-chip 4096 x 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output 315 mW at 180 MSPS

ANALOG DEVICES ad9106

Contextual Info: Quad, Low Power, 12-Bit, 180 MSPS, Digital-toAnalog Converter and Waveform Generator AD9106 Data Sheet FEATURES GENERAL DESCRIPTION Highly integrated quad DAC On-chip 4096 x 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output 315 mW at 180 MSPS

Contextual Info: INA– INB+ INB– INC+ INC– IND+ IND– AAF LNA PGA AAF LNA PGA AAF VREF PGA RBIAS LNA DVDD33x AAF DVDD18x PGA MUXA LNA PDWN AVDD18x INA+ AVDD33x FUNCTIONAL BLOCK DIAGRAM REFERENCE DSYNC MUX 12-BIT ADC DRV D[0:11] INADC+ INADC– SPI NOTES 1. AVDD18x = AVDD18, AVDD18ADC.

AD9230-250EBZ

Abstract: AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 ANSI-644 0125P
Contextual Info: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9230 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD 1.8V AD9230 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT 12 STAGING LVDS CLOCK

Contextual Info: 10-Bit, 200 MSPS/250 MSPS/300 MSPS, 1.8 V Analog-to-Digital Converter AD9211 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD 1.8V AD9211 REFERENCE DRVDD DGND VIN+ VIN– TRACK-AND-HOLD ADC 10-BIT CORE CLK+ CLK– 10 OUTPUT 10 STAGING LVDS CLOCK MANAGEMENT