HARVARD ARCHITECTURE Search Results

APP3770

Abstract: MAXQ2000 MAXQ3210 MAXQ3212 MAXQ7665 MAXIM label AN3770
Contextual Info: Maxim > App Notes > MICROCONTROLLERS Keywords: MAXQ, Programming, Table, Constant, Harvard Apr 19, 2006 APPLICATION NOTE 3770 Table Operations for the MAXQ Architecture Abstract: The MAXQ microcontroller is a Harvard machine. One should not, however, assume that MAXQ

Contextual Info: ANALOG D E V IC E S □ SHARC Super Harvard Architecture Computers ADSP-21060/ADSP-21062 SUMMARY High Performance Signal Processor for Speech, Sound, Graphics, and Imaging Applications Super Harvard Architecture— Four Independent Buses for Dual Data, Instructions, and I/O

32 pins qfn 5x5 footprint

Abstract: MINIPROG "Digital Comparator" CY8C20x66 P0427 Mixed-Signal Array Technical Reference Manual Users guide to I2C-bus control programs QFN 56 7x7 0.5
Contextual Info: CY8C20x46, CY8C20x66 CapSense Applications Features • Low Power CapSenseTM Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, TouchScreens, and Proximity Sensors ■ Powerful Harvard Architecture Processor

SAR10

Abstract: cy8c28000 cy8c28000-24pvxi BA RW CY8C28452-24PVXI CY8C28403-24PVXI transistor BA RW 85Y12 ae rw CY8C27443-24PXI
Contextual Info: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor

SAR10

Abstract: 339 opamp 3 pin fan speed control using pwm BA RW bc 339 ae rw E100 HMI Manual
Contextual Info: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 Extended Industrial PSoC Programmable System-on-Chip Features ❐ ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor

cop interface

Abstract: 56800E DSP56800E DSP56800ERM DSP56854 DSP56854FG120 DSP56854PB "quad Timer"
Contextual Info: Digital Signal Controllers 56854 Target Applications > Stand-alone MP3 player > Voice processing > Multiprocessor telephony systems > Digital telephone answering device The 56800E core is based on a Harvard-style architecture consisting of three execution

Contextual Info: CY8C21345/CY8C21645 CY8C22345/CY8C22345H/CY8C22645 Automotive PSoC Programmable System-on-Chip Automotive PSoC ® Programmable System-on-Chip™ Features ❐ • Automotive Electronics Council AEC Q100 qualified Powerful Harvard-architecture processor

Contextual Info: CY8C21345, CY8C21645 CY8C22345, CY8C22345H, CY8C22645 Automotive PSoC Programmable System-on-Chip Automotive PSoC ® Programmable System-on-Chip™ Features ❐ • Automotive Electronics Council AEC Q100 qualified Powerful Harvard-architecture processor

Contextual Info: STLUX385A Digital controller for lighting and power conversion applications with 6 programmable PWM generators, 96 MHz PLL, DALI Datasheet - production data • Integrated microcontroller – Advanced STM8 core with Harvard architecture and 3-stage pipeline

85Y12

Abstract: SSOP24-5 AN2349 ASD22 ASD11
Contextual Info: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor

sharc ADSP-21xxx

Abstract: ipac ADSP-2100 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21065L ADSP-21160 ADSP-21161N sharc ADSP-21xxx architecture INSTRUCTION SET
Contextual Info: PRELIMINARY TECHNICAL DATA a DSP Microcomputer ADSP-21161N Preliminary Technical Data SUMMARY High performance 32-bit DSP—applications in audio, medical, military, wireless communications, graphics, imaging, motor-control, and telephony Super Harvard Architecture—four independent buses

Cypress Projected Capacitive touch sensor design

Abstract: easy bread board Project 32 pins qfn 5x5 footprint capacitive touch key sensor cypress MCU capacitive touch key sensor MCU Cypress touch datasheet keypad 4x4 assembly code hmt design data book IMO Timer CY8C20234
Contextual Info: CY8C20234, CY8C20334 CY8C20434, CY8C20534 PSoC Mixed-Signal Array Features • Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, and Proximity Sensors ■ Powerful Harvard Architecture Processor

ASC21

Abstract: ACB01CR2 ACB00CR1
Contextual Info: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 Extended Industrial PSoC Programmable System-on-Chip Features ❐ ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor

cy8c28000-24pvxi

Abstract: 56-pin 7x7 QFN cy8c28000 graphical LCD PSoc BA RW QFN 64 8x8 footprint scl 4026 ae pin diagram
Contextual Info: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC® Device Group ■ Powerful Harvard Architecture Processor

00FF

Abstract: ADSP-21000 ADSP-21020 ADSP-21060 ADSP-21061 ADSP-21062
Contextual Info: ADSP-21061 SHARC Preliminary Data Sheet October 1996 For current information contact Analog Devices at 617 461-3881 ADSP-21060/62 SHARC ADSP-21061 ADSP-21061 Super Harvard SHARC Architecture Computer PreliminaryData Information Preliminary Sheet SUMMARY

m15m R2

Abstract: ADSP-21XXX architecture ADSP-21020 adsp21020kg133
Contextual Info: ANALOG ► DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution

Contextual Info: DSP Microcomputer ADSP-21160 ANALOG DEVICES Preliminary Technical Data SUMMARY KEY FEATURES . H igh performance 32-bit D SP— applications in audio, medical, m ilitary, graphics, imaging, and communication . Super Harvard Architecture— four independent

TT 46 N 16 KOF

Abstract: DT 75 N 16/14 KOF til 3881 3881 tt 60 n 16 kof ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21160 ADSP2116x
Contextual Info: DSP Microcomputer ADSP-21160 ANALOG DEVICES Preliminary Technical Data SUMMARY KEY FEATURES . H igh performance 32-bit D SP— applications in audio, medical, m ilitary, graphics, imaging, and communication . Super Harvard Architecture— four independent

sem 2105 16 pin

Contextual Info: ADSP-2100 Family DSP Microcomputers ADSP-21XX ANALOG DEVICES SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

ADSP-21000

Abstract: ADSP-21060 reference manual ADSP-21062 ADSP-21060 ADSP-21060L ADSP-21062L
Contextual Info: a ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 SUMMARY High Performance Signal Processor for Communications, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,

Contextual Info: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC® Device Group ■ Powerful Harvard Architecture Processor

mini projects using bread board and integrated

Abstract: CY8C20234 CY8C20334 CY8C20434 CY8C20534
Contextual Info: CY8C20534, CY8C20434 CY8C20334, CY8C20234 PSoC Mixed-Signal Array Features • Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, and Proximity Sensors ■ Powerful Harvard Architecture Processor

ACI0-10

Abstract: potentiometer sensor cy8c28413
Contextual Info: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied resource options within one PSoC® device group ■ Powerful Harvard-architecture processor

ADSP-21000

Abstract: ADSP-21060 ADSP-21060L ADSP-21062 ADSP-21062L
Contextual Info: ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 a SUMMARY High Performance Signal Processor for Communications, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,