GT 1141 Search Results

an2140

Abstract: HCS08 c code example transistor FF75 107F FC06 FC07 HCS08 MC9S08GB60 debug module in MC9S08GB
Contextual Info: Freescale Semiconductor Application Note AN2140/D Rev. 1, 6/2003 Freescale Semiconductor, Inc. Serial Monitor for MC9S08GB/GT By Jim Sibigtroth 8/16 Bit Systems/Applications Engineering Austin, Texas Introduction This application note describes a 1-Kbyte monitor program for the

AN2140

Abstract: MC9S08GB60 107F FC06 FC07 HCS08 doit HCS08 c code example interrupt
Contextual Info: Freescale Semiconductor, Inc. Application Note AN2140/D Rev. 1, 6/2003 Freescale Semiconductor, Inc. Serial Monitor for MC9S08GB/GT By Jim Sibigtroth 8/16 Bit Systems/Applications Engineering Austin, Texas Introduction This application note describes a 1-Kbyte monitor program for the

1141MF2

Abstract: 1241MF2 1041MF2 26LS32 41MF 41MF2 0040616 1241MF
Contextual Info: Data Sheet £ ^ A T gT 'Microelectronics 41MF2 Quad Differential Line Receiver Features Description • 1000 V CDM and 1000 V HBM input ESD rating T h e 4 1 M F 2 Quad Differential Line R eceiver inte­ grated circuits receive digital data over balanced transm ission lines. These receivers translate differ­

Contextual Info: THIS c D R A WI N G IS COPYRIGHT UNPUBLISHED. — RELEASED BY F OR ALL — PUBLICATION RIGHTS L OC RESERVED. REV I S IONS D I ST GT P LTR Y2 A DESCRIPTION REVISED PER ECO-11-005301 DATE DWN APVD 14APR11 RK HMR B Angeschlagener Leiter: Leiter: F-C rim p c

1670467

Abstract: 114180 CuSn4
Contextual Info: CO THIS C DR AWI NG IS 7 UNPUBLISHED. RELEASED COPYRIGHT ALL FOR PUBLICATION Rlt,HTi L OC RESERVED. D I ST REV I S I O N S GT LTR S T R I P FORM - S I N G L E W IRE S E A L Bandwar e - E i n z e l - D i c h t u n g System S T R I P FORM - U N S E A L E D

gt 1141

Abstract: I250H DTA08E
Contextual Info: _ DTA08E SA\YO Silicon Planar Type 0.8A Bidirectional Thyristor '•'V X Package Dimensions um t:m m ,|PT ¡W Features • L o w A C pow er control. • Peak O FF-siatc voilage : 4ÜÜV, JF II, 1141 -ft —Ä - - Mi • R M S ON-state current : 0.8A .

gt 1141

Contextual Info: SINGLE SUPPLY QUAD PECL-TO-TTL WITH LATCHED O UTPUT ENABLE sMlbSX^CTOR Clockworks SY10H842 SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

DTA08E

Contextual Info: Ordering number : EN1875A D T A4-8E No.l875A Silicon Planar Type 0.8A B idirectional Thyristor F e a tu r e s • Low AC power control •Peak OFF-state voltage : 400V • RMS QN-state c u r r e n t : 0.8A • TO-92 package A b s o lu te M axim um R a tin g s at Ta = 25°C

HD-SDI over sdh

Abstract: OC48 SSTL-15 SSTL-18 Tables 29 - 43 of the SAS-2.1 Xlaui
Contextual Info: 1. DC and Switching Characteristics September 2010 SIV54001-4.4 SIV54001-4.4 Electrical Characteristics This chapter covers the electrical and switching characteristics for Stratix IV devices. Electrical characteristics include operating conditions and power consumption.

Cyclone

Abstract: HD-SDI over sdh OC48 SSTL-15 SSTL-18 simple digital volume control circuit
Contextual Info: Section I. Stratix IV Device Datasheet and Addendum This section includes the following chapters: • Chapter 1, DC and Switching Characteristics ■ Chapter 2, Addendum to the Stratix IV Device Handbook Revision History Refer to each chapter for its own specific revision history. For information on when

HD-SDI over sdh

Abstract: hd-SDI splitter OC48 SSTL-15 SSTL-18 30Gbps
Contextual Info: Stratix IV Device Handbook Volume 4 Stratix IV Device Handbook Volume 4 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-4.5 2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

ddr3 sata controller

Abstract: OC48 SSTL-15 SSTL-18 DFE EQUALIZER ERROR SCRAMBLE
Contextual Info: Section I. Device Datasheet and Addendum for Stratix IV Devices This section includes the following chapters: • Chapter 1, DC and Switching Characteristics for Stratix IV Devices ■ Chapter 2, Addendum to the Stratix IV Device Handbook Revision History

Contextual Info: A V 3.3V SINGLE SUPPLY QUAD P E P L T D T T I W IT H SYNERGY PECL TO-TTL WITH O UTPUT ENABLE SEMICONDUCTOR Clockworks PRELIMINARY SY10H841L SY100H841L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

OC48

Abstract: SSTL-15 SSTL-18
Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.1 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.1 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

CCPD 33 CB 100MHz

Abstract: OC48 SSTL-15 SSTL-18
Contextual Info: Section I. Stratix IV Device Datasheet and Addendum This section includes the following chapters: • Chapter 1, DC and Switching Characteristics ■ Chapter 2, Addendum to the Stratix IV Device Handbook Revision History Refer to each chapter for its own specific revision history. For information on when

vx 18a18

Contextual Info: 1. DC and Switching Characteristics for Stratix IV Devices March 2014 SIV54001-5.8 SIV54001-5.8 This chapter contains the following sections: • “Electrical Characteristics” ■ “Switching Characteristics” ■ “I/O Timing” ■ “Glossary” Electrical Characteristics

CCPD 33 CB 100MHz

Abstract: design of FM transmitter final year project OC48 SSTL-15 SSTL-18
Contextual Info: Stratix IV Device Handbook Volume 4 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-4.1 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.3 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos

Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.7 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos

Contextual Info: Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V4-5.8 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos

higig pause frame

Abstract: verilog code for 128 bit AES encryption OF IC 741 tsmc design rule 40-nm cyclone V
Contextual Info: 1. Stratix IV Device Family Overview SIV51001-3.1 Altera Stratix® IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high-end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor

tsmc design rule 40-nm

Contextual Info: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.2 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

vhdl code for All Digital PLL

Abstract: 4000 CMOS texas instruments
Contextual Info: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.4 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.