FLIP FLOP Search Results

CD40xx

Abstract: CD40174B CD40174BC CD40174BM CD40175B CD40175BC CD40175BM MC14174B MC14175B MM74C174
Contextual Info: CD40174BM CD40174BC Hex D Flip-Flop CD40175BM CD40175BC Quad D Flip-Flop General Description The CD40174B consists of six positive-edge triggered D-type flip-flops the true outputs from each flip-flop are externally available The CD40175B consists of four positiveedge triggered D-type flip-flops both the true and complement outputs from each flip-flop are externally available

CD40174BC

Abstract: CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
Contextual Info: Revised January 1999 CD40174BC • CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.

T74LS74

Abstract: T54LS74AD2
Contextual Info: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q

MC14174

Contextual Info: CD40174BC Hex D-Type Flip-Flop October 1987 Revised January 2004 CD40174BC Hex D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available.

SN74LS74AN

Abstract: SN74LS74A SN74LS74AD
Contextual Info: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q

Hitachi DSA0095

Abstract: 1D10 HD74ALVCH162821
Contextual Info: HD74ALVCH162821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs ADE-205-186A Z 2nd. Edition September 1997 Description The HD74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides

Hitachi DSA00164

Contextual Info: HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs ADE-205-171A Z 2nd. Edition September 1997 Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides

54LS174

Abstract: 54LS174DMQB 54LS174FMQB 54LS174LMQB 54LS175 LS174 LS175 DM74LS174
Contextual Info: DM74LS174/DM74LS175 Hex/Quad D Flip-Flops with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad 175 versions feature complementary outputs from each flip-flop.

Hitachi DSA002744

Contextual Info: HD74ALVCH162821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs ADE-205-186A Z 2nd. Edition September 1997 Description The HD74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides

Contextual Info: HD74ALVCH162821 3,3-V 20-bit Bus Interface Flip Flops with 3-state Outputs HITACHI ADE-205-186A Z 2nd. Edition September 1997 Description The HD74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides

DM54S175J

Abstract: DM74S174 DM74S175 S174 DM54S174J DM54S175W DM74S174N
Contextual Info: DM74S174, DM74S175 Hex/Quad D Flip-Flops with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad 175 versions feature complementary outputs from each flip-flop.

DM74174

Abstract: MS-001 N16E
Contextual Info: DM74174 Hex/Quad D-Type Flip-Flop with Clear September 1986 Revised July 2001 DM74174 Hex/Quad D-Type Flip-Flop with Clear General Description Features These positive-edge triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear

Contextual Info: HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs HITACHI ADE-205-171 Z Preliminary, 1st. Edition January 1997 Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides

ls378

Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

74AC

Abstract: MC74AC534 MC74ACT534 motorola act374 ACT374 MOTOROLA
Contextual Info: MC74AC534 MC74ACT534 Octal DĆType FlipĆFlop With 3ĆState Outputs OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC74AC534/74ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus

DM74S174N

Abstract: DM74S174 DM74S175 DM74S175N MS-001 N16E
Contextual Info: Revised April 2000 DM74S174 • DM74S175 Hex/Quad D Flip-Flop with Clear General Description Features These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad DM74S175 versions feature complementary outputs from each flip-flop.

Contextual Info: 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the LVCH16721A are edgetriggered D-type flip-flops with qualified clock storage. On the

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - CMOS technology. The ALVCH162821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flipflops are edge-triggered D-type flip-flops. On the positive

74LS377

Abstract: 74ls175 pin diagram 74LS174 74LS175 74LS378 74LS379 motorola ceramic dual in-line case 74ls377 motorola
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

ZD607

Abstract: 721a k40z
Contextual Info: 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the LVCH16721A are edgetriggered D-type flip-flops with qualified clock storage. On the

T74LS374B1

Abstract: T74LS374XX T74LS374M1 1N306 LS374 T54LS374D2 T74LS374
Contextual Info: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS DESCRIPTION The T54LS374/T74LS374 is a high-speed, lowpower Octal D-type Flip-Flop featuring separate Dtype inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock CP and Output Enable (OE) are common to all flip-flops.

Hitachi DSA00279

Contextual Info: HD74HC114 Dual J-K Flip-Flops with Preset, Common Clear and Common Clock Description This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. each flip-flop has independent J, K and preset inputs and Q and Q outputs. Two flip-flops

Contextual Info: 54F374 54F374 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS190 54F 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and

54175

Abstract: 54174DMQB 54174FMQB DM54174J DM54174W DM74174 DM74174N DM74175 J16A N16E
Contextual Info: EM ICONDUCTQ R t DM74174, DM74175 Hex/Quad D Flip-Flops with Clear 175 contains fo u r flip-flops w ith double-rail outputs General Description These positive-edge triggered flip-flops utilize T T L circuitry to im plem ent D -type flip-flop logic. All have a direct clear input,