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    FINE AND COARSE GAIN CONTROL Search Results

    FINE AND COARSE GAIN CONTROL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    9519ADM/B
    Rochester Electronics LLC 9519A - Universal Interrupt Controller PDF Buy
    D8274
    Rochester Electronics LLC 8274 - Multi-Protocol Serial Controller (MPSC) PDF Buy
    MD82510/B
    Rochester Electronics LLC 82510 - Serial I/O Controller, CMOS, CDIP28 PDF Buy
    MD8259A/B
    Rochester Electronics LLC 8259A - Interrupt Controller, 8086, 8088, 80186 Compatible PDF Buy
    MR82510/B
    Rochester Electronics LLC 82510 - Serial I/O Controller, CMOS PDF Buy

    FINE AND COARSE GAIN CONTROL Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: PGA308-DIE www.ti.com SBOS624 – JUNE 2012 SINGLE-SUPPLY, AUTO-ZERO SENSOR AMPLIFIER WITH PROGRAMMABLE GAIN AND OFFSET Check for Samples: PGA308-DIE FEATURES 1 • • • • • • • • Digital Calibration for Bridge Sensors Offset Select: Coarse and Fine


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    PGA308-DIE SBOS624 PGA308 PDF

    Contextual Info: Micro Linear ML2003, ML2004 Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in 0.1 dB steps. • ■ ■ ■ ■ The gain settings are selected by a 9-bit digital word.


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    ML2003, ML2004 ML2003 ML2004 14-pin ML2003 PDF

    ML2903

    Abstract: ML2B sm micro switches
    Contextual Info: March 1997 % M c r a L in e a r ML2003, ML2004 Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in O.ldB steps. • Low noise 0 dBrnc max with +24dB gain


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    ML2003, ML2004 ML2003 ML2004 14-pin ML2903 ML2003 ML2903 ML2B sm micro switches PDF

    Dsp c3c0

    Abstract: ML2004 c3c0
    Contextual Info: Micro Linear ML2003, ML2004 Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in O.ldB steps. • Low noise 0 dBrnc max with +24dB gain ■ Low harmonic distortion


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    ML2003 ML2004 14-pin ML2003, ML2003 ML2004 Dsp c3c0 c3c0 PDF

    ML2004

    Abstract: 18-PIN ML2003 ML2021 c3c0
    Contextual Info: www.fairchildsemi.com ML2003, ML2004 Logarithmic Gain/Attenuator Features General Description • • • • • The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of –24 to +24 dB in 0.1 dB steps. Low noise: 0 dBrnc max with +24dB gain


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    ML2003, ML2004 ML2003 ML2004 -60dB DS300042003 18-PIN ML2021 c3c0 PDF

    Contextual Info: July 1988 mR. Micro Linear ML2003, ML2004 Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in O.ldB steps. • Low noise 0 dBrnc max with +24dB gain


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    ML2003, ML2004 ML2003 ML2004 -60dB 1-20kHz 14-pin 18-pin PDF

    Contextual Info: % M ic r o L in e a r ML2003, ML2004 Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2003 and ML2004 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in 0.1dB steps. • ■ ■ ■ ■ The gain settings are selected by a 9-bit digital word.


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    ML2003, ML2004 ML2003 ML2004 14-pin teleML2003 PDF

    MAX1385AETM

    Contextual Info: 19-4456; Rev 0; 2/09 KIT ATION EVALU LE B A IL A AV Dual RF LDMOS Bias Controllers with I2C/SPI Interface The MAX1385/MAX1386 set and control bias conditions for dual RF LDMOS power devices found in cellular base stations. Each device includes a high-side current-sense amplifier with programmable gains of 2, 10,


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    MAX1385/MAX1386 MAX1385/MAX1386. 12-bit MAX1385AETM PDF

    ML2008

    Abstract: ML2008IP ML2009 ML2233
    Contextual Info: March 1997 ML2008, ML2009 µP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range of –24 to +24dB in 0.1dB steps. • Low noise ■ Low harmonic distortion


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    ML2008, ML2009 ML2008 ML2009 16-bit ML2008 ML2008IP ML2233 PDF

    fine and coarse gain control

    Abstract: d4418 ds2008 ML2008 ML2008IP ML2009 ML2233 rg 142 attenuation
    Contextual Info: March 1997 ML2008*, ML2009* µP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range of –24 to +24dB in 0.1dB steps. • Easy interface to microprocessors is provided by an input


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    ML2008* ML2009* ML2008 ML2009 16-bit ML2008 DS2008 fine and coarse gain control d4418 ML2008IP ML2233 rg 142 attenuation PDF

    Contextual Info: March 1997 ro Linear ML2008, ML2009 jiP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range o f-24 to +24dB in 0.1 dB steps. • Low noise Easy interface to microprocessors is provided by an input


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    ML2008 ML2009 16-bit 16-Bit ML2008, ML2009 ML2008IP PDF

    CR06

    Abstract: CR10-CR12 AU03 01tr00 resistor MR25 ADV7202 CR14 CR26-CR27 CRYSTAL CR25 AU09
    Contextual Info: a Simultaneous Sampling Video Rate Codec ADV7202 FEATURES Four 10-Bit Video DACs 4:2:2, YCrCb, RGB I/P Supported 10-Bit Video Rate Digitization at up to 54 MHz AGC Control (؎6 dB) Front End 3-Channel Clamp Control Up to Five CVBS Input Channels, Two Component YUV,


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    ADV7202 10-Bit 64-Lead ST-64B) MS-026BCD C02602 CR06 CR10-CR12 AU03 01tr00 resistor MR25 ADV7202 CR14 CR26-CR27 CRYSTAL CR25 AU09 PDF

    au51

    Abstract: AU44
    Contextual Info: a Simultaneous Sampling Video Rate Codec ADV7202 FEATURES Four 10-Bit Video DACs 4:2:2, YCrCb, RGB I/P Supported 10-Bit Video Rate Digitization at up to 54 MHz AGC Control (؎6 dB) Front End 3-Channel Clamp Control Up to Five CVBS Input Channels, Two Component YUV,


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    10-Bit ADV725k 27MHz ADV7202 64-Lead ST-64B) MS-026BCD C02602 au51 AU44 PDF

    Contextual Info: Simultaneous Sampling Video Rate Codec ADV7202 a FEATURES Four 10-Bit Video DACs 4:2:2, YCrCb, RGB I/P Supported 10-Bit Video Rate Digitization at up to 54 MHz AGC Control (؎6 dB) Front End 3-Channel Clamp Control Up to Five CVBS Input Channels, Two Component YUV,


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    ADV7202 10-Bit 64-Lead ST-64B) MS-026BCD C02602â PDF

    Contextual Info: May 1988 1 % Micro Linear PR ELIM IN A R Y _ M L 2008, M L2009 ¡aP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in 0.1 dB


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    L2009 ML2008 ML2009 -60dBm 1-20kHz 16-bit 18-pin ML2009CP PDF

    104XA

    Abstract: D817V
    Contextual Info: September 1994 Micro Linear ML2008, ML2009 iP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f-2 4 to +24dB in 0.1dB steps. • Low noise Easy interface to microprocessors is provided by an input


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    ML2008, ML2009 L2008 L2009 16-bit ML2008 104XA D817V PDF

    Contextual Info: % M ie r o L in e a r ML2008, ML2009 ¡xP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithm ic gain/attenuators w ith a range o f - 2 4 to + 24 dB in 0.1 dB steps. • Low noise OdBrnç max with +24dB gain


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    ML2008, ML2009 L2008 L2009 -60dB 1-20kHz ML2008 ML2009 16-bit 18-pin PDF

    Combo Spindle VCM Driver

    Abstract: L7200 vcm controller Combo (Spindle VCM) Driver l720 spindle motor VCM controller 64 12v 1N4148 TQFP64 mozart
    Contextual Info: L7200 MOZART, 12V DISK DRIVE SPINDLE & VCM, POWER & CONTROL “COMBO” PRODUCT PREVIEW GENERAL • 12V +/- 10% OPERATION. ■ REGISTER BASED ARCHITECTURE ■ MINIMUM EXTERNAL COMPONENTS ■ BCD TECHNOLOGY VCM DRIVER ■ 1.7A DRIVE CAPABILITY ■ 0.75Ω TOTAL BRIDGE IMPEDANCE AT 125°C


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    L7200 Combo Spindle VCM Driver L7200 vcm controller Combo (Spindle VCM) Driver l720 spindle motor VCM controller 64 12v 1N4148 TQFP64 mozart PDF

    Contextual Info: Micro Linear ML2008, ML2009 ¡xPCompatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and M L2009 are digitally controlled logarithm ic gain/attenuators w ith a range o f - 2 4 to +24dB in 0.1 dB steps. • ■ ■ ■ ■ Easy interface to microprocessors is provided by an input


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    ML2008, ML2009 ML2008 L2009 L2008 16-Bit PDF

    NTC 100-11

    Abstract: 100-11 thermistor NTC SCL 055 jesd22-A115B TB347 TB363 ISL25700 ISL25700FRUZ-T ISL25700FRUZ-T7A ISL25700FRUZ-TK
    Contextual Info: ISL25700 Features The Temperature Controlled MOSFET Driver is a highly integrated solution that combines a MOSFET driver with overcurrent protection and two 8-bit resolution DACs on a monolithic CMOS integrated circuit IC . • User-programmable Setpoint via I2C Serial Interface


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    ISL25700 ISL25700 076mm MO-255UABD 5M-1994. FN6885 NTC 100-11 100-11 thermistor NTC SCL 055 jesd22-A115B TB347 TB363 ISL25700FRUZ-T ISL25700FRUZ-T7A ISL25700FRUZ-TK PDF

    Contextual Info: ML2008, ML2009 |iP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f-2 4 to +24dB in 0.1 dB steps. • Low noise Easy interface to microprocessors is provided by an input


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    ML2008, ML2009 L2008 L2009 ML2008 16-bit L2008 PDF

    Combo (Spindle VCM) Driver

    Abstract: L6268 TQFP44
    Contextual Info: L6268 12V DISK DRIVE SPINDLE & VCM, POWER & CONTROL “COMBO” PRODUCT PREVIEW GENERAL 12V +/- 10% OPERATION. REGISTER BASED ARCHITECTURE MINIMUM EXTERNAL COMPONENTS BICMOS + VERTICAL DMOS (1.5mm) VCM DRIVER 1.5A DRIVE CAPABILITY 0.9W TOTAL BRIDGE IMPEDANCE AT 25°C


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    L6268 Combo (Spindle VCM) Driver L6268 TQFP44 PDF

    DC iris schematic

    Abstract: iris scanner circuit DB10 XRD9861 XRD98L61 XRD98L61AIV P4002-1
    Contextual Info: Preliminary XRD98L61 CCD Image Digitizers with CDS, PGA and 12-Bit A/D July 2000-4 FEATURES • • • • • • • • • • • • 12-bit Resolution ADC 20MHz Sampling Rate 10-bit Programmable Gain: 0dB to 36dB PGA Digitally Controlled Offset-Calibration with Pixel


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    XRD98L61 12-Bit 20MHz 10-bit 125mW DC iris schematic iris scanner circuit DB10 XRD9861 XRD98L61 XRD98L61AIV P4002-1 PDF

    DC iris schematic

    Abstract: fast linear ccd 512 iris scanner circuit DB10 XRD9861 XRD98L61 XRD98L61AIV "auto focus" cctv pcb electrical diagram CCTV SCHEMATIC P500-17
    Contextual Info: Preliminary XRD98L61 CCD Image Digitizers with CDS, PGA and 12-Bit A/D September 2000-1 FEATURES • • • • • • • • • • • • 12-bit Resolution ADC 20MHz Sampling Rate 10-bit Programmable Gain: 0dB to 36dB PGA Digitally Controlled Offset-Calibration with Pixel


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    XRD98L61 12-Bit 20MHz 10-bit 125mW DC iris schematic fast linear ccd 512 iris scanner circuit DB10 XRD9861 XRD98L61 XRD98L61AIV "auto focus" cctv pcb electrical diagram CCTV SCHEMATIC P500-17 PDF