FEATURE LIST DDR3 Search Results

Contextual Info: P1022 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1022 feature set: • Two High-performance 32-bit e500v2 Cores that Implement the Power Architecture Technology: • 36-bit Physical Addressing

Contextual Info: P1013 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1013 feature set: • One High-performance 32-bit e500v2 Core that Implements the Power Architecture Technology: • 36-bit Physical Addressing

DDR3 timing diagram

Contextual Info: P1022 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1022 feature set: • Two High-performance 32-bit e500v2 Cores that Implement the Power Architecture Technology: • 36-bit Physical Addressing

Contextual Info: P1013 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1013 feature set: • One High-performance 32-bit e500v2 Core that Implements the Power Architecture Technology: • 36-bit Physical Addressing

QorIQ dhrystone

Abstract: SGMII USB bridge RGMII to SGMII bridge P1011EC freescale QorIQ P1011 SEC security engine NC103
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1011EC Rev. 1, 03/2012 P1011 P1011 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the feature set: • A high-performance 32-bit core, built on Power

P2010

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P2010EC Rev. 2, 08/2013 P2010 P2010 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P2010 feature set: • Single high-performance Power Architecture e500 cores.

P2020EC

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P2020EC Rev. 2, 08/2013 P2020 P2020 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P2020 feature set: • Dual high-performance Power Architecture e500 cores.

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1021EC Rev. 1, 03/2012 P1021 P1021 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the feature set: • Dual high-performance 32-bit cores, built on Power

QorIQ dhrystone

Abstract: P1011EC MARKING NC39 SGMII RGMII bridge capacitive coupling ethernet P1011 NC110 sdrx2 AN2919 mb-a02
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1011EC Rev. 0, 08/2011 P1011 P1011 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the feature set: • A high-performance 32-bit core, built on Power

AN-440

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: BSC9131 Rev. 0, 03/2014 BSC9131 BSC9131 QorIQ Qonverge Multicore Baseband Processor The following list provides an overview of the feature set: • High-performance 32-bit e500 core built on Power

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1022EC Rev. 2, 9/2013 P1022 P1022 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1022 feature set: • Two high-performance 32-bit e500v2 cores that implement

P1020EC

Abstract: P1020E P1020 QorIQ P1020 QorIQ dhrystone RGMII to SGMII bridge P1020DDR boot configuration pins in p1020 SDHC physical layer 3P1020
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1020EC Rev. M, 02/2011 P1020 P1020 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the feature set: • Dual high-performance 32-bit cores, built on Power

freescale p1013

Abstract: MAX2320 P1013EC RSA ARM RGMII MDM06 Rx2P TSEC1588
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1013EC Rev. 0, 11/2011 P1013 P1013 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1013 feature set: • One high-performance 32-bit e500v2 core that implements

BSC9132

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: BSC9132 Rev. 0, 03/2014 BSC9132 BSC9132 QorIQ Qonverge Multicore Baseband Processor The following list provides an overview of the feature set: • Two high-performance 32-bit e500 cores built on Power

p2020 dhrystone

Abstract: P2020EC p2020 P2020E QorIQ Debug and Performance Monitoring QorIQ dhrystone POWERPC E500 instruction set p2020 core SDHC physical layer AN2919
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P2020EC Rev. 1, 03/2012 P2020 P2020 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P2020 feature set: • Dual high-performance Power Architecture e500 cores.

freescale p1013

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1013EC Rev. 2, 9/2013 P1013 P1013 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1013 feature set: • One high-performance 32-bit e500v2 core that implements

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: P1014EC Rev. 4, 05/2014 P1014 P1014 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1014 feature set: • High-performance 32-bit Book E-enhanced core based on

QorIQ dhrystone

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1023 Rev. 1, 05/2013 P1023 P1023 QorIQ Integrated Processor Data Sheet The following list provides an overview of the chip’s feature set: • High-performance 32-bit Book E-enhanced cores that

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: P1010EC Rev. 4, 05/2014 P1010 P1010 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1010 feature set: • High-performance 32-bit Book E-enhanced core based on

Contextual Info: P2020 QorIQ Integrated Processor Hardware Specifications Datasheet The following list provides an overview of the P2020 feature Set: • Dual High-performance Power Architecture e500 Cores • 36-bit Physical Addressing • • • • • – Double-precision Floating-point Support

p2020

Contextual Info: P2020 QorIQ Integrated Processor Hardware Specifications Datasheet The following list provides an overview of the P2020 feature Set: • Dual High-performance Power Architecture e500 Cores • 36-bit Physical Addressing • • • • • – Double-precision Floating-point Support

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ddr phy interface

Abstract: AN-550-2 module AN-550
Contextual Info: AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs AN-550-2.0 March 2010 This application note describes how to implement the delay-locked loop DLL phase offset feature with Altera Stratix® FPGAs and HardCopy® ASICs. Introduction

Contextual Info: eBOX550-100-FL Fanless Embedded System with AMD G-Series APU T40E 1.0 GHz and VGA & DisplayPort for Dual Display Features AMD G-Series APU T40E 1.0 GHz onboard Supports VGA+DisplayPort dual view Fanless operation design with full feature I/O DDR3-1066/1333 SO-DIMM max. up to 4 GB