FD 223 Search Results

Contextual Info: Aug. 2006 Cover Page HYS72T 512022 H FD– 3 . 7 – A Internet Data Sheet Rev. 1.10 Internet Data Sheet HYS72T512022HFD–3.7–A Revision History Revision History: Rev. 1.10, 2006-08-17 All Adapted internet edition All Converted Data Sheet with new template.

Contextual Info: December 2006 Cover Page HYS72T 512022 H FD– 3 . 7 – A 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.2 Internet Data Sheet HYS72T512022HFD–3.7–A 240-Pin Fully-Buffered DDR2 SDRAM Modules Revision History

M12-100

Contextual Info: ¿Tsmæs&P ss M12 Device DS2/DS1 Mux/Demux TXC-03375 DATA SHEET Preliminary DESCRIPTION • Multiplexes fo u fD S l signals into one DS2 signal • Demultiplexes one DS2 signal into its four constituent DS1 signals • Fault tolerant: bridges two M12s - one main and

MC145474

Abstract: MC145554 MC68160 MC68360 MPC860
Contextual Info: Communication Processor Module 16.8.16 DSP Execution Times The execution time of a given function is a linear function of the number of taps and iterations specified for that function. It contains an overview for context switch, handling the FD, and initialization. Table 16-20 below lists the execution time for each of the DSP functions.

MPC821

Abstract: MC145474 MC145554 MC68160 MC68360
Contextual Info: Communication Processor Module 16.8.16 DSP Execution Times The execution time of a given function is a linear function of the number of taps and iterations specified for that function. It contains an overview for context switch, handling the FD, and initialization. Table 16-20 below lists the execution time for each of the DSP functions.

Contextual Info: ii dB V23809-C8-T10 Multim ode 1300 nm LED Fast Ethernet/FD DI/ATM 170 MBd 1x9 Transceiver w ith ST Connector D im ension s in m m inches (1) .039 [(127)1 en (2.54)1 1(20.32 m [ff (0.46) .02 x 9 1-0-10 (O .3 )@ |A @ | m (5.27) .207 -E 3 - (9.8) max. .39 max.

sm 0038 ir receiver

Abstract: sm 0038 receiver sm 0038 PIN DIAGRAM 3 pin ir receiver module 0038
Contextual Info: That HEWLETT mL'fim PA CK A R D MT-RJ Duplex Single Mode Transceiver Technical Data HFCT-5903E Features D escription • MT-RJ D u p lex S in gle M ode T ra n sceiver • P ow er C om pliant to ANSI X 3.184- 1993 Standard for FD DI SMF-PMD C ategory 1 O p toelectron ic P erform ance

9161-120

Abstract: 9161BA sot-89 marking code 8C Capacitor cd 104 1uF 50V G9161-120T25U transistor f1u sot 23 5 marking CODE a04 marking code A50 30-9161 G9161
Contextual Info: G9161 Global Mixed-mode Technology Inc. 400mA High PSRR, LDO Regulators Features General Description „ The G9161 series is a low supply current, high PSRR, and low dropout linear regulator that comes in a SOT-89, SOT-223, TO-252 and SOP-8 with Power PAD package. The supply current at no-load is 90µA.

KD 334

Abstract: C0402 CC 0201 K R X5R KC 508 KEMET C0402 CC 0201 K R fd 223 fd 35 k EF 183 C0805C103K5RAC
Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

dd marking

Abstract: Marking KA3 f105k
Contextual Info: CERAMIC OPEN MODE CAPACITORS FEATURES KEMET’s Open Mode Ceramic Surface Mount Capacitor is designed to significantly minimize the probability of a low IR or Short Circuit Condition when forced to failure in a board flex situation. This reduces the potential for causing catastrophic failures. This product is RoHS Compliant.

capacitor C0402 50V X7R

Abstract: KEMET C0402 KD 472 M j 182 k 151 transistor C0805C103K5RAC C1210 C1812 m270000 C2220
Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

Contextual Info: CERAMIC CHIP CAPACITORS INTRODUCTION Significant Figure of Temperature Coefficient Working Voltage: Refers to the maximum continuous DC working voltage permissible across the entire operating temperature range. The reliability of multilayer ceramic capacitors is not extremely sensitive to

C0805

Abstract: C1206 C1210 F3102 472 EM
Contextual Info: Product Bulletin Surface Mount Ceramic Chip Capacitors / FT-CAP / Flexible Terminations Outline Drawing W W LL TT B S The FT-CAP is a surface mount multi-layer ceramic capacitor that incorporates a unique and flexible termination system. Integrated with KEMET's standard termination materials, a conductive epoxy is utilized

Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs Y5V Dielectric, 6.3 – 50 VDC (Commercial Grade) Overview KEMET’s Y5V dielectric features an 85°C maximum operating temperature and is considered “general-purpose.” The Electronics Components, Assemblies & Materials

Contextual Info: TEMPUS C B C 20 2mm Interconnect Typical Futurebus+ 12 SU System Unit Connector Layout Please refer to page 62 As Used On Profile Profile Profile Profile A : General Purpose Multiprocessor Systems B: General Purpose I/O Systems F: Very High Performance Multiprocessor Systems

kemet capacitor C0603

Abstract: Z5U Dielectric, 50 – 100 VDC (Commercial Grade)
Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs Y5V Dielectric, 6.3 – 50 VDC (Commercial Grade) Overview KEMET’s Y5V dielectric features an 85°C maximum operating temperature and is considered “general-purpose.” The Electronics Components, Assemblies & Materials

F3281

Abstract: diode EB C0805 C1206 C1210 F3102
Contextual Info: Product Bulletin Surface Mount Ceramic Chip Capacitors / FT-CAP / Flexible Terminations Outline Drawing W W Tin Plate LL Electrodes TT B Nickel Plate S Conductive Metallization Silver Epoxy The FT-CAP is a surface mount multi-layer ceramic capacitor that incorporates a unique and flexible termination system. Integrated with KEMET's standard termination materials, a conductive epoxy is utilized

Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

1825 smd

Abstract: Z5U Dielectric, 50 – 100 VDC (Commercial Grade)
Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs Y5V Dielectric, 6.3 – 50 VDC (Commercial Grade) Overview KEMET’s Y5V dielectric features an 85°C maximum operating temperature and is considered “general-purpose.” The Electronics Components, Assemblies & Materials

KD 472 M

Abstract: KEMET C0402 DATA SHEET P 131 GB p 181 gb CC 0201 K R X5R dimension GB CD 07 j 182 KC 508 KB 222 capacitor C1210
Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

KD 271

Abstract: C0402 C0805 C0805C103K5RAC C1210 C1812 C1825 C2220 EIA481-1 IEC60286-6
Contextual Info: CERAMIC CHIP CAPACITORS KEMET FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

01005 land pattern

Abstract: 51000000
Contextual Info: Surface Mount Multilayer Ceramic Chip Capacitors SMD MLCCs Y5V Dielectric, 6.3VDC-50VDC (Commercial Grade) Overview KEMET’s Y5V dielectric features an 85°C maximum operating temperature and is considered “general-purpose.” The Electronics Components, Assemblies & Materials Association (EIA)

EB smd code marking tantalum capacitor

Abstract: capacitor SMD 476 35v SMD ka3 SMD 1206 ka3 IEC-286-6 BME MLCC KA3 smd code
Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and

FB471

Abstract: MARKING 330D 390D 470D C0805C103K5RAC C1210 C1812 C1825 C2220 EIA481-1
Contextual Info: CERAMIC CHIP CAPACITORS FEATURES • C0G NP0 , X7R, X5R, Z5U and Y5V Dielectrics • 10, 16, 25, 50, 100 and 200 Volts • Standard End Metalization: Tin-plate over nickel barrier • Available Capacitance Tolerances: ±0.10 pF; ±0.25 pF; ±0.5 pF; ±1%; ±2%; ±5%; ±10%; ±20%; and