F2 D7 Search Results

d4515

Abstract: LED highlight
Contextual Info: 5.0 mm DIA LED LAMP REV:A / 0 520PG2C-F2 PACKAGE DIMENSIONS ITEM MATERIALS RESIN Epoxy Resin LEAD FRAME Sn Plating iron Alloy Note: 1.All Dimensions are in millimeters. 2.Tolerance is ±0.25mm 0.010 " Unless otherwise specified. 3.Protruded resin under flange

2192VE100LT

Abstract: 2096VE 2192VE
Contextual Info: ispLSI 2192VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 Output Routing Pool A0 D Q A1 A2 A3 A4 Logic Global Routing Pool GRP

PA 0016

Abstract: 520LB7C D4463
Contextual Info: 5.0 mm DIA LED LAMP REV:A / 1 520LB7C-F2 PACKAGE DIMENSIONS ITEM MATERIALS RESIN Epoxy Resin LEAD FRAME Sn Plating iron Alloy Note: 1.All Dimensions are in millimeters. 2.Tolerance is ±0.25mm 0.010 " Unless otherwise specified. 3.Protruded resin under flange

1048C

Contextual Info: Specifications ispLSI and pLSI 1048C ispLSI and pLSI 1048C ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 A2 A4 IG N D Q Logic Global Routing Pool GRP

1048C

Contextual Info: ispLSI and pLSI 1048C ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 A2 A4 IG N D Q Logic Global Routing Pool GRP A5 A6 A7 D B0 B1 B2 B3 B4 B5 B6 B7

HP8560E

Abstract: HP8560 hp80000 HI5741
Contextual Info: Harris Semiconductor No. AN9629 Harris Data Acquisition July 1996 Multi-Tone Performance of the HI5741 Authors: Juan C. Garcia Introduction quencies 2f1-f2 or 2f2-f1 , will appear as the worst case spur at the frequency of the missing tone in the sequence. The

Contextual Info: STM8L151C2/K2/G2/F2 STM8L151C3/K3/G3/F3 8-bit ultralow power MCU, up to 8 KB Flash, up to 256 B data EEPROM, RTC, timers, USART, I2C, SPI, ADC, comparators Datasheet −production data Features • Operating conditions – Operating power supply: 1.65 to 3.6 V

F2-20GF1

Abstract: Mitsubishi PLC Communication Cable mac 50 Melsec MEDOC 2.3 melsec mac 50 manual mitsubishi a1s mitsubishi pin out plc to pc interface A0J2-C214 melsec medoc F2 mitsubishi touch screen pc cable rs232 mitsubishi cable pc a plc A1s
Contextual Info: Issued July 1993 015-850 Data Pack D Data Sheet ‘MAC’ operator panels for Mitsubishi PLCs The range includes the following products: ● MAC 30 data access unit for Mitsubishi A1S or FX PLCs ● MAC 50/MV operator panel for Mitsubishi A1S, FX, F1 or F2 PLCs.

Mitsubishi PLC Communication Cable mac 50

Abstract: F2-20GF1 melsec mac 50 manual Melsec MEDOC 2.3 mitsubishi pin out plc to pc interface mitsubishi cable pc a plc AJ71C24-S Mitsubishi PLC Communication Cable mitsubishi melsec fx cable connection melsec manual
Contextual Info: Issued March 1997 232-4207 Data Pack D Data Sheet ‘MAC’ operator panels for Mitsubishi PLCs The range includes the following products: ● MAC 30 data access unit for Mitsubishi A1S or FX PLCs ● MAC 50/MV operator panel for Mitsubishi A1S, FX, F1 or F2 PLCs.

Contextual Info: Specifications ispLSI and pLSI 1048 ispLSI and pLSI 1048 ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool E7 E6 E5 E4 E3 E2 E1 E0 S Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 D Q A2 A3 A4 Logic Global Routing Pool GRP Array

Contextual Info: 8 7 6 5 4 3 2 1 D J5 SDA<0> K5 SDA<1> H6 SDA<2> F9 C4 F6 F10 H2 J10 A1 0VDD1.8 1VDD1.8 2VDD1.8 3VDD1.8 4VDD1.8 D7 D8 H10 A7 D4 D5 D6 1VDD3.3 2VDD3.3 3VDD3.3 0VDD3.3 A2 B2 B1 B3 RCLKI TCLKI RSER TSER G10 B10 B9 C8 A10 RX_DV RX_CLK SDATA<0> H1 SDATA<1> F2 SDATA<2>

Contextual Info: ispLSI and pLSI 1048 ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool E7 E6 E5 E4 E3 E2 E1 E0 S Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 D Q A2 A3 A4 Logic Global Routing Pool GRP Array ES Output Routing Pool A0 A1 A5

Contextual Info: Energy Metering 1C with On-Chip Fault Detection ANALOG DEVICES Preliminary Technical Data FEATURES High Accuracy, supports 50/6 0 Hz IEC 521/1036 Less than 0.3% error over a dynam ic range of 500 to 1 The AD7751 supplies average real p o w e r on the frequency outputs F1 and F2

0212-80B-isp1048

Abstract: 1048E 1048-80L
Contextual Info: ispLSI 1048 In-System Programmable High Density PLD Functional Block Diagram Output Routing Pool E7 E6 E5 E4 E3 E2 E1 E0 Output Routing Pool A0 D Q A1 A2 A3 A4 S Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 Logic Global Routing Pool GRP A5 Array D Q D Q

APD InGaAs array

Abstract: n3482 receiver L16.2 10G APD STM-4 STM16 STM-16 2-80km electro absorption modulator 10G transceiver DFB APD 155
Contextual Info: Fibre. Op. Brochure 28.10.1998 14:12 Uhr Page F2 N ov e mb e r Fibreoptic c o m p o n e n t s 0 5 - 0 1 8 1 9 9 8 Fibre. Op. Brochure 28.10.1998 14:13 Uhr Page 1 INDEX 1000k Telecom Fibreoptic Components 100k 10k 1k Data Com STM1/STM4 Transciever Modules STM16 Optical

AA13

Abstract: AA19 AC11 AC13 AD12
Contextual Info: ispLSI 3320 In-System Programmable High Density PLD Functional Block Diagram J0 Output Routing Pool ORP G3 F3 G2 G1 G0 F2 F1 F0 E3 D Q D Q H1 E2 OR Array D Q E1 H2 H3 D Q D Q OR Array Twin GLB E0 D Q D3 D Q D2 I1 D Q I2 D1 I3 D0 C3 Global Routing Pool

AA13

Abstract: AA19 AC11 AC13 AD12
Contextual Info: ispLSI 3320 In-System Programmable High Density PLD Functional Block Diagram J0 Output Routing Pool ORP G3 F3 G2 G1 G0 F2 F1 F0 E3 D Q D Q H1 E2 OR Array D Q E1 H2 H3 D Q D Q OR Array Twin GLB E0 D Q D3 D Q D2 I1 D Q I2 D1 I3 D0 C3 Global Routing Pool

AA13

Abstract: AA19 AC11 AC13 AD12 bga 208 PACKAGE
Contextual Info: ispLSI 3320 High-Density Programmable Logic J0 F3 G2 G1 G0 F2 F1 F0 E3 D Q D Q H1 E2 OR Array D Q E1 AND Array H2 H3 D Q D Q OR Array Twin GLB E0 D Q D3 D Q D2 I1 D Q I2 D1 I3 D0 C3 Global Routing Pool GRP J1 C2 J2 C1 J3 C0 Output Routing Pool (ORP) I0

74F251

Abstract: 54F251
Contextual Info: AD VA N C E INFOR M ATION S N S 4 F2 5 1, SN 74F25 1 1-0 F 8 D A TA S ELEC TO R S/M U LTIPLEXER S W ITH 3-STATE O U TPU TS D 2 9 3 2 . M AR C H 1987 Three-State Versions of SN54F151 and SN74F151 Three-State Outputs Interface Directly with System Bus Performs Parallel-to-Serial Conversion

MC68681FN

Abstract: 74ACT14 motorola rx2 RMC BA 18 BD126 MC68302RC PB10
Contextual Info: 1 2 3 4 5 6 7 8 A A B B C C D D OE E F D 0:15 A(1:23) FC(0:2) CS(0:3) MC68LC302EMU D(0:15) A(1:23) FC(0:2) CS(0:3) U23 OE LDS UDS AS FC(0) FC(1) FC(2) OE CS(0) CS(1) CS(2) CS(3) DTACK IAC K1 J1 H3 H2 H1 F2 F3 E1 D1 C1 B1 D2 D3 C2 A1 E4 D5 C3 B2 G3 G2 F1 L6

ic 7500B

Abstract: d7554 D4560 jb 5531 PD7554 7554A uPD7507 EVAKIT-7500B hi pot 7700 PDA-800
Contextual Info: MEC M O SIÊïglIISS MOS In te g ra te d C ircuit lÏ T /\f Z #PD7554 1 4 t 'y h • v - f i n /uPD7554il, /¿PD7500 y ' J - a i t i - ? T-\ tK— h& £ tâ h L T 'W f2 ' < ’y £ î* Ji ] L T J i 1 £ - f a f, x 'i T / i. • 4 > f 7 i “ X ^ r t i s L t Ì 3 f) , ^PD7500x U — X v l . & m m È tzl± uC 0M -% 777 ì 'J <7)zu— 7 'C P U

k d718

Abstract: d718 D-718 T d718 o d718 p d718 o
Contextual Info: Product Specification D718 GaAs Power Doubler, 40 – 750MHz, 19.0dB min. Gain @ 750MHz, 300mA max. @ 24VDC FEATURES • • • • • • Excellent linearity Superior return loss performance Extremely low distortion Optimal reliability Low noise Unconditionally stable under all terminations

D720

Contextual Info: Product Specification D720 GaAs Power Doubler, 40 – 750MHz, 20.8dB min. Gain @ 750MHz, 300mA max. @ 24VDC FEATURES • • • • • • Excellent linearity Superior return loss performance Extremely low distortion Optimal reliability Low noise Unconditionally stable under all terminations

100-pin BGA

Abstract: AS 108-120 EPM7128A EPM7128AE EPM7128AE JTAG
Contextual Info: EPM7128A and EPM7128AE Dedicated Pin-Outs ver. 1.0 Dedicated Pin 84-Pin PLCC 83 1 84 2 14 23 62 71 42, 82 100-Pin TQFP 87 89 88 90 4 15 62 73 38, 86 GNDIO 7, 19, 32, 47, 59, 72 11, 26, 43, C3, D7, E5, F6, 59, 74, 95 G4, H8 VCCINT 3.3 V Only 3, 43 39, 91