F 20JC 10 Search Results

T3j 50

Contextual Info: TOSHIBA -CDISCRETE/OPTO} j DE | TCHTESD DQG5372 □ | SSR ZERO-CROSSTYPE C H A R A C T ER IST IC 4* S s1 «— Drop Out Voltage Drop Out Current V fd è Turn-off time Isolation Resistance . VDR = Rated • . v - 0.5 - 1 - . - I tm = 6 A Vw(RMS)=100Vrms

70V06

Abstract: 70V07 IDT70V05
Contextual Info: 25/0251 CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • Fully asynchronous operation • Automatic power-down • Expandable data bus to 16/18 bits or more using Master/ Slave chip select when using more than one device

70V06

Abstract: 70V07 IDT70V05
Contextual Info: 25/0251 CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM • Fully asynchronous operation • Automatic power-down • Expandable data bus to 16/18 bits or more using Master/ Slave chip select when using more than one device

Contextual Info: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow

SEM 2005 16 PINS

Abstract: sem 2005 CY7C007AV CY7C006AV CY7C016AV CY7C017AV CY7C138AV CY7C139AV CY7C144AV CY7C145AV
Contextual Info: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow

Contextual Info: <X>TAITIEN te Type Multi/Her ttìtig t Controlled Crystal RoHS Com pliant Standard Oscillator FEATURE 1.Typical 7.5 x 5.0 x 1.65mm ceram ic SMD package. 2.Tight sym m etry 45 to 55% available. A c tu a l S ize 3 .Packing: Tape & Reel, 1000/3000 pcs per Reel, 1 -9 9 pcs per Bulk/Tape.

Contextual Info: 1 CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV PRELIMINARY 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 4K/8K/16K/32K x 8 organizations CY7C0138AV/144AV/

32Kx16

Abstract: Intel EEPROM 32kx8
Contextual Info: Alliance Semiconductor Memories SRAM 64K - 3 . 3 Volt All densities in bits 512K 1M 256K 32Kx8 A sy n ch ro no u s/ burst •5 Volt X 8Kx8 X 64KX8 1 32KX16 128KX8 X 32KX8 64KX8 X 32Kx9 i 32KX16 2M 4M 64KX32 512KX8 64KX16 X 32KX32 256KX16 X 128Kx8 X 256KX4

SEM 2005 16 PINS

Abstract: sem 2005 CY7C138AV pin diagram of sem 2005 CY7C007AV CY7C016AV CY7C017AV CY7C139AV CY7C144AV CY7C145AV
Contextual Info: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow

Contextual Info: Schottky Barrier Diode Twin Diode W tm OUTLINE S20J C 10 100V 20A Feature • Tj=150°C • Tj=150°C • fîlR = 0 . 7 m A • High lo Rating • Low lR=0.7mA :u c < u • Resistance for thermal run-away Main Use • y -h P C .L C D t= ^ i • Secondary rectification for A dapter

74151

Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Contextual Info: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of

70V06

Abstract: IDT70V05
Contextual Info: 1 CY7C138V/144V/006V/007V PRELIMINARY CY7C139V/145V/016V/017V 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM • Fully asynchronous operation • Automatic power-down • Expandable data bus to 16/18 bits or more using Master/ Slave chip select when using more than one device

Contextual Info: High Performance 128Kx8 C M O S SRAM p i AS7C1024 AS7C1024L 128Kx8 CM O S S RAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE1, CE2, OE inputs - 10/12/15/20/25/35 ns address access time

Contextual Info: Reprogrammable Asynchronous CMOS Logic Device Features • Advanced-user programmable macro­ cell • CMOS EPROM technology for repro­ grammability • Up to 20 input terms • 10 programmable I/O macrocells • Output macrocell programmable as combinatorial or asynchronous Dtype registered output

Contextual Info: PLDC20G10B/PLDC20G10 CYPRESS SEMICONDUCTOR CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L 8,20R 8,20R 6, 20R 4,12L 10,14L 8, 16L 6,18L 4,20L 2, and 20V8 Features • Fast — Commercial: tpo = 15 ns, tc o — 10

CY7C425-65JC

Abstract: CY7C419 CY7C421 CY7C425 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203
Contextual Info: fax id: 5404 /25/29/ CY7C419/21/25/29/33 256/512 /1K /2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425)

Contextual Info: — , PLDC20RA10 W CYPRESS Reprogrammable Asynchronous CMOS Logic Device SEMICONDUCTOR Features • Advanced-user programmable macro­ cell • CMOS EPROM technology for repro­ grammability • Up to 20 input terms • 10 programmable I/O macrocells • Output m acrocell programmable as

Contextual Info: PLDC20RA10 CYPRESS SEMICONDUCTOR Features • Advanced-user programmable macro­ cell • CMOS EPROM technology for repro­ grammability • Up to 20 input terms • 10 programmable I/O macrocells • Output macrocell programmable as combinatorial or asynchronous Dtype registered output

Contextual Info: CY7C291A CY7C292A/CY7C293A 'W CYPRESS = SEMICONDUCTOR Reprogrammable 2K x 8 PROM Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 2 0 ns commercial — 25 ns (military) • Low power — 660 mW (commercial and military)

CY7C419

Abstract: CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43
Contextual Info: fax id: 5404 /25/29/ CY7C419/21/25/29/33 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of

jy 604

Contextual Info: 13 12 11 10 -CENTERLINE OF PIN IN AREA SHOWN DIM. A NOT TO VARY FROM CENTERLINE OF PIN AT DATUM CKTS. NO. OF -D- BY • D IM .B MORE THAN .0 0 8 IN ANY DIRECTION DIM. B o - SEE D E TAIL 3 (2.54±.05 ( .I00±.002 ( TYP. BETWEEN ANY TWO CONSECUTIVE CKTS AT DATUM

B 503 Potentiometers

Abstract: 2SK2500 c420 diode CY7C425 P15 Package CY7C419 CY7C420 CY7C421 IDT7200 IDT7201
Contextual Info: 1CY 7C41 9/ 21/2 5/2 9/ 33 CY7C419/21/25/29/3 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of

DATASHEET AM7202

Abstract: 7C41930 CY7C425-40PC c420 diode CY7C429-15JI CY7C419 CY7C421 CY7C425 AM7204 CY7C433
Contextual Info: /25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)

CY7C425

Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203 C4203
Contextual Info: 19/21/25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)