DYNAMIC SHIFT REGISTER Search Results

2503N

Abstract: 2502N 2504N signetics 2502 signetics 2503 2504 signetics
Contextual Info: Sign etics Memories - Shift Register 2502 1024 Bit Multiplexed Dynamic Shift Register 256 x 4 2503 1024 Bit Multiplexed Dynamic Shift Register (512 x 2) 2504 1024 Bit Multiplexed Dynamic Shift Register (1024 x 1) C O N N E C T IO N D IA G R A M o u t, in .

MM5104H

Abstract: mm4104
Contextual Info: MM4104/MM5104 National Semiconductor Shift Registers MM4104/MM5104 Dynamic Shift Register g e n e ra l d escrip tion The MM4104/MM5104 360/359, 228/287, 40/32 bit dynamic shift register is a monolithic MOS integrated circuit utilizing p-channel enhancement

Contextual Info: TM S 3401 LC, NC -512-BIT DYNAMIC SHIFT REGISTER TMS 3402 LC, NC 500-BIT DYNAMIC SHIFT REGISTER features • Two-phase dynamic logic • 5-MHz operation • Directly T T L compatible at input and output • No external resistors required • Low power dissipation - 0.2 mW/bit 1 MHz

fairchild mos

Abstract: a5f330314x ScansUX978 dpw 02w
Contextual Info: D E C E M B E R 1967 • 3303 MOS INTEGRATED CIRCUIT DUAL 25 MOS DUAL 25 BIT DYNAMIC SHIFT REGISTER MOS 3303 BIT DYNAMIC GENERAL DESCRIPTION — The 3303 is a Dual 25 Bit Dynamic Shift Register. It is a monolithic integrated PHYSICAL DIMENSIONS In accordance with JEDEC TO-lOO

3402lc

Abstract: SN7400 NC-512-BIT
Contextual Info: MOS LSI TM S 3401 LC, NC 512 BIT DYNAMIC SHIFT REGISTER TMS 3402 LC, NC 500-BIT DYNAMIC SHIFT REGISTER featu es Two-phase dynamic logic 5-MHz operation Directly T T L compatible at input and output No external resistors required Low power dissipation — 0.2 m W /bit 1 MHz

SN7400

Abstract: 3305 J 3305
Contextual Info: MOS LSI TMS 3304 LR-TRIPLE 66-BIT DYNAMIC SHIFT REGISTER TMS 3305 LR-TRIPLE 64-BIT DYNAMIC SHIFT REGISTER > z c > features • 5-MHz operation • T T L compatibility • Single-ended open-drain output buffers • Low power dissipation 33 < tovj description

signetics 2524

Abstract: shift register 2525 2524N 2525N
Contextual Info: S ig n e tic s Memories - Shift Register 2524 — 512-Bit Recirculating Dynamic Shift Register 512 x 1 2525 — 1024-Bit Recirculating Dynamic Shift Register (1024 x 1) CONNEECTION D IA G R A M G E N E R A L DE SC R IPTIO N The 2525 102 4-b it recirculating dy n a m ic s h ift register

PW-2N

Abstract: pw-2nS pw2n
Contextual Info: MOS LSI TM S 3404 JC, TM S 3404 NC DUAL 512-BIT DYNAMIC SHIFT REGISTER m B features 3 C Two-phase dynamic logic > I 5-MHz shift rate Low power — 0.1 mW/bit at 1 MHz Power supplies — +5 V, -1 2 V Single-ended output T TL compatible — without external components

D5869

Abstract: WD5869 D5669 WD58
Contextual Info: WESTERN DIGITAL C O R P O R A T I O N WD5869 WD5869 Dynamic Shift Register FEATURES GENERAL DESCRIPTION • • • . • The W D5869 Dual 640 Bit Dynamic Shift Register is a m ono­ lithic MOS integrated circuit designed for use in com puter display peripherals. The clocks and recirculate logic are in­

3404

Abstract: 75322 VSS19 Texas TMS 0100 LSI
Contextual Info: MOS LSI TM S 3404 JC, TM S 3404 NC DUAL 512-BIT DYNAMIC SHIFT REGISTER features B 31 Two-phase dynamic logic 5-MHz shift rate C » a •i Low power - 0.1 mW/bit at 1 MHz Power supplies — +5 V, — 12 V Single-ended output T TL compatible — without external components

TC5010P

Abstract: TC5055P TC4012 4 DIGIT DECADE COUNTER
Contextual Info: ° MAINTENANCE-DISCONTINUED TYPE NUMBERS TYPE NO. FUNCTION REPLACEMENT TC4508C DUAL 4-BIT LATCH TC4508BP TC5000C/P DUAL 50/64 STAGE STATIC SHIFT REGISTER TC5050P TC5001C 4-DIGIT DECADE COUNTER TC5001P TC5004P DUAL 500/512-BIT DYNAMIC SHIFT REGISTER TC5010P

TC5010P

Abstract: TC5055P TC5042BP
Contextual Info: » MAINTENANCE-DISCONTINUED TYPE NUMBERS TYPE NO. FUNCTION REPLACEMENT TC4508C DUAL 4-BIT LATCH TC4508BP TC5000C/P DUAL 50/64 STAGE STATIC SHIFT REGISTER TC5050P TC5001C 4-DIGIT DECADE COUNTER TC5001P TC5004P DUAL 500/512-BIT DYNAMIC SHIFT REGISTER TC5010P

MM5020

Abstract: MM4020 MM4021 MM5021 LT8030
Contextual Info: M M 4 0 2 0 /M M 5 0 2 0 , M M 4 0 2 1 /M M 5 0 2 1 DÛS Dynamic S hift Register; M M 4 0 2 0 /M M 5 0 2 0 quad 8 0 -b it dynamic shift register M M 4 0 2 1 /M M 5 0 2 1 triple 8 0 -b it dynamic shift register general description The MM 4020/MM5020. and MM4021/MM5021

TC5010P

Abstract: tc5003p TC5055P TC5001C TC4011BP equivalent TC5042BP tc741 tc5003 4 DIGIT DECADE COUNTER HIGH SPEED FREQUENCY DIVIDER
Contextual Info: ° MAINTENANCE-DISCONTINUED TYPE NUMBERS TYPE NO. FUNCTION REPLACEMENT TC4508C DUAL 4-BIT LATCH TC4508BP TC5000C/P DUAL 50/64 STAGE STATIC SHIFT REGISTER TC5050P TC5001C 4-DIGIT DECADE COUNTER TC5001P TC5003P TV SYNC GENERATOR TC9015P TC5004P DUAL 500/512-BIT DYNAMIC SHIFT REGISTER

CD4062

Abstract: CD4062A CD4062AT
Contextual Info: CD4062A Types ^ ÿí, 2 ^ CMOS 200-Stage Dynamic Shift Register MAXIMUM RATINGS, Absolute-Maximum Values: STORAGE TEMPERATURE RANGE Tgrn . ~65to+150*C OPERATING-TEMPERATURE RANGE (TA):

MM1403AN

Abstract: M1402 MM1404AN MM1402AN MM1404A 1404AN PI-116 MM1402A 160X 1403AN
Contextual Info: National Semiconductor MM1402A/MM1403A/MM1404A 1024 Bit Dynamic Shift Registers reference: t a b l e Code Stock No. MM1402AN MM1403AN MM1404AN 3451SX 34519R 34520A GENERAL DESCRIPTION The M M1402A/M M 1403A /M M1404A/1024-bit dynamic sh ift registers are MOS m onolithic

Contextual Info: SIEMENS SDA 9251X 868352 - Bit Dynamic Sequential Access Memory for Television Applications TV - SAM CMOS IC Preliminary Data Features • 212 x 64 x 16 x 4 bit organization • Triple port architecture • One 16 x 4 bit input shift register • Two 16 x 4 bit output shift registers

KDA0316

Abstract: KDA0316D KDA0316LD KDA0316LN KDA0316N 20-DIP-300A
Contextual Info: KDA0316 D/A CONVERTER INTRODUCTION 20-DIP-300A The KDA0316 is a CMOS 16-bit digital-to-analog converter for compact disc player that uses a dynamic level shift conversion method combining R-string, Pulse Width Modulation and level shift. FEATURES • • •

KDA0316LN

Abstract: KDA0316 KDA0316D KDA0316LD KDA0316N 5.1 CHANNEL CIRCUIT DIAGRAM AUDIO 2QS0 82oi 18-DIP-300 BTW13
Contextual Info: KDA0316 D/A CONVERTER INTRODUCTION 20-DIP-300A The KDA0316 is a CMOS 16-bit digital-to-analog con­ verter for compact disc player that uses a dynamic level shift conversion method combining R-string, Pulse Width Modulation and level shift. FEATURES • •

power supply ic 1507

Abstract: M1407 k 1507 M 1407 Am14/1506
Contextual Info: Am14/1506-Am14/1507 Dual 100-Bit Dynamic Shift Registers Distinctive Characteristics • • • • • 1 0 0 % reliability assurance testing in com pliance with M IL -S T D -8 8 3 Dual 100-bit silicon gate M O S shift registers D T L and T T L compatible

TMS3409NC

Abstract: TMS3409
Contextual Info: MOS LSI TMC 3409 JC, TMC 3409 NC QUADRUPLE 80-BIT DYNAMIC SHIFT REGISTER features 2.5-MHz shift rate Recirculate logic Power supplies — +5 V, 0 V, — 12 V All inputs T T L compatible Single T T L compatible clock T T L compatible outputs Low power — 300 mW

Contextual Info: KDA0316 CMOS INTEGRATED CIRCUITS 16-BIT D/A CONVERTER FOR CDPs The KDA0316 is a CMOS 16-bit digital-to-analog con­ verter for compact disc player that uses a dynamic level shift conversion method combining R-string, Pulse W idth Modulation and level shift.

texas 74 series TTL logic gates

Abstract: tms3417 TMS3409 TMS3417JC 3417jc 3417
Contextual Info: MOS LSI TMS 3409 JC, NC; TMS 3417 JC, NC QUADRUPLE 80-, 64-BIT DYNAMIC SHIFT REGISTERS BULLETIN NO. DL-S 7512266, MAY 1975 • 10-kHz to 5-MHz Operation • Dynamic Configuration • Single TTL-Compatible Clock 16-PIN CERAMIC AND PLASTIC DUAL-IN-LiNE PACKAGES

power supply ic 1507

Abstract: tA 1507 AM-1407 k 1507 Am14/1506
Contextual Info: Am14/1506•Am14/1507 Dual 100-Bit Dynamic Shift Registers Distinctive Characteristics • • • • • 100% reliability assurance testing in compliance w ith Ml L-STD-883 Dual 100-bit silicon gate MOS shift registers D TL and T T L compatible Low-power dissipation o f 0.4m W /blt at 1 MHz