DUAL 2-WIDE 2-INPUT AND-OR-INVERT GATE Search Results

DM74LS51

Abstract: AND-OR-INVERT 54LS51 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A
Contextual Info: 54LS51 DM74LS51 Dual 2-Wide 2-Input 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates

DM74LS51

Abstract: 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A 54LS51
Contextual Info: DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates. General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function.

2-input & 3-input AND-OR-invert Gate

Abstract: 74F51 N74F51D N74F51N
Contextual Info: INTEGRATED CIRCUITS 74F51 Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate Product specification IC15 Data Handbook Philips Semiconductors 1989 Mar 03 Philips Semiconductors Product specification Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D N14A
Contextual Info: 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate 3-3 AND-OR-INVERT function. General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a Ordering Code: Commercial Package Number

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code:

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised July 1999 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code: Order Number

54LS51DMQB

Abstract: 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A N14A
Contextual Info: , June 1989 54LS51/DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

DM74LS51

Abstract: DM74LS51M DM74LS51N M14A MS-001 N14A
Contextual Info: Revised March 2000 DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

Contextual Info: June 1989 54LS51/DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

54LS51

Abstract: 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A N14A
Contextual Info: National é l â Semiconductor 54LS51/DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gales each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

Contextual Info: LS51 National Ælm Semiconductor 54LS51/DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

Contextual Info: LS51 National JCm Sem iconductor 54LS51/DM 74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

Contextual Info: MOTOROLA DUAL 2-WIDE 2-3-INPUT "OR-AND/OR-AND-INVERT" GATE DUAL 2-WIDE 2-3-INPUT "OR-AND/OR-AND-INVERT" GATE The MC10117 is a general purpose logic element designed for use in data control, such as digital multiplexing or data distri­ bution. Pin 9 is common to both gates.

truth table 74ls51

Abstract: 74LS51 751A-02
Contextual Info: M MOTOROLA, SN54/74LS51 DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY Vcc J SUFFIX CERAMIC CASE 632-08 GND N SUFFIX PLASTIC CASE 646-06 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

T74LS51B1

Abstract: T54LS51D2 T74LS51 pc-s004
Contextual Info: Mi 1 I DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR- INVERT GATE DESCRIPTION The T54LS51/T74LS51 is a high speed DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR INVERT GA­ TE fabricated in LOW POWER SCHOTTKY tech­ nology. 1 B1 Plastic Package 1 D1/D2 Ceramic Package s M1 Micro Package

Contextual Info: LS51 £ £ ] National À æ Semiconductor 54LS51/DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-lnput AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

751A-02

Abstract: H12Y 74f51
Contextual Info: MC54/74F51 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE CONNECTION DIAGRAM VCC 1C 1B 1F 1E 1D 1Y 14 13 12 11 10 9 8 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE FAST SCHOTTKY TTL 1 2 3 4 5 6 7 1A 2A 2B 2C 2D 2Y GND J SUFFIX CERAMIC CASE 632-08

Contextual Info: S G S-THOMSON Si » 7 ci 2 ci 2 3 7 D0332Ö2 T ISGTH -15 SGS-THOMSON T74LS51 ¡y DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR-INVERT GATE DESCRIPTIO N The T74LS51 is a high speed DUAL 2-WIDE 2INPUT / 3-INPUT AND-OR-INVERT GATE fabri­ cated in LOW POWER SCHOTTKY technology.

Contextual Info: MOTOROLA MC54/74F51 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE CONNECTION DIAGRAM Vqc 1C 1B 1F 1E 1D 1V PmI nil m rrn m in m DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE FAST SCHOTTKY TTL □ J S U FFIX CE R A M IC C A SE 632-08 LU LU LU LU LU LU

74HCT51

Abstract: GD74HCT51
Contextual Info: GD54/74HC51, GD54/74HCT51 DUAL AND-OR-INVERT GATES General Description These devices are identical in pinout to the 5 4/74L S 51 . They contain one 2-wide 2-input & one 2-wide 3-input AND-OR-INVERT gates. These devices are characterized for operation over wide

T74LS51B1

Contextual Info: *57 S G S -T H O M S O N iy T74LS51 DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR-INVERT GATE DESCRIPTION The T74LS51 is a high speed DUAL 2-WIDE 2INPUT / 3-INPUT AND-OR-INVERT GATE fabri­ cated in LOW POWER SCHOTTKY technology. SCH EM ATIC B1 Plastic Package D1

74LS51 truth table

Abstract: 74ls51 4 inputs OR gate truth table truth table SN54LSXXJ SN74LSXXN SN74LSXXD truth table NOT gate 74 751A-02
Contextual Info: SN54/74LS51 DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02

TC74HC51AP

Contextual Info: TOSHIBA TC74HC51AP/AF/AFN Dual 2 Wide-2 Input and/or Invert Gate The TC74HC51A is a high speed CMOS 2-WIDE 2-INPUT/ 3-INPUT AND/OR/INVERT GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

DM74S51

Abstract: DM74 DM74S51N N14A
Contextual Info: DM74S51 Dual 2-Wide 2-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Connection Diagram Dual-In-Line Package DS006454-1 Order Number DM74S51N