DS2153Q Search Results

S2153Q

Contextual Info: DS2153Q DALLAS SEMICONDUCTOR FEATURES DS2153Q E1 Single—Chip T ransceiver PIN ASSIGNMENT • Com plete E1 CEPT P C M -3 0/IS D N -P R I transceiver functionality FUNCTIONAL BLOCKS • Onboard line interface for clock/data recovery and waves haping • 3 2 -b it or 12 8 -b it jitte r attenuator

SA81A

Contextual Info: DS2153Q E1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete E1 CEPT PCM-30/ISDN-PRI Transceiver Functionality On-Board Line Interface for Clock/Data Recovery and Waveshaping 32-Bit or 128-Bit Jitter Attenuator Generates Line Build-Outs for Both 120Ω

CRYSTAL 2.048MHz

Abstract: TESO Digital Alarm Clock by ttl TSA8 DS2153Q DS2154L RC32 TC32 TS16
Contextual Info: App Note 348: DS2154L vs. DS2153Q Application Note App Note 348: DS2154L vs. DS2153Q 1.0 Introduction This application note highlights the differences between the DS2154L and the DS2153Q E1 Single Chip Transceivers. The DS2154L is a superset of the DS2153Q. All of the original features of the DS2153Q

rg802

Abstract: DS2151Q DS2153 DS2153Q DS2153QN TS16 CRC9
Contextual Info: DS2153Q DS2153Q E1 Single–Chip Transceiver FEATURES PIN ASSIGNMENT • Complete E1 CEPT PCM–30/ISDN–PRI transceiver FUNCTIONAL BLOCKS LONG & SHORT HAUL LINE INTERFACE line interface for clock/data recovery and waveshaping • 32–bit or 128–bit jitter attenuator

transistor 431 smd

Abstract: smd PULSE TRANSFORMER BT8510 DS2151Q DS2153Q DS2186 PM4341 PM6341 T7290 TEW5720
Contextual Info: CEPT/T1 TEW5720 Output Transformer TEW5720-1 is designed to be used as transmit transformer for: TEW5720 is designed to be used as a transmit transformer in the ISDN primary rate access network with the following devices: – Dallas DS2186 DS2151Q DS2153Q

DS2153Q

Abstract: DS2187 LXT310 PM4341 T7290 TEW5363 TEW5363-1
Contextual Info: CEPT /T1 TEW5363-1 is designed and approved to be used as a Receive Transformer in T1 and CEPT applications, with the following devices: – Dallas TEW5363 Input Transformer DS2187 DS2153Q Also as Input/OutputTransformer for : – Level One LXT310 & 318 Typical applications are:

44-PIN

Abstract: DS2151Q DS2153 DS2153Q DS2153QN TS16
Contextual Info: DS2153Q E1 Single-Chip Transceiver www.dalsemi.com PIN ASSIGNMENT ELASTIC STORES FRAMER LONG & SHORT HAUL LINE INTERFACE FUNCTIONAL BLOCKS PARALLEL CONTROL PORT DALLAS DS2153Q E1 SCT 40 41 42 43 1 44 2 3 4 7 39 31 16 30 17 29 28 32 15 27 33 14 26 34 13 25

CRC9

Abstract: S2153 IMR11 FORDATA RCr20 resistors
Contextual Info: DS2153Q DALLAS SEMICONDUCTOR FEATURES DS2153Q E1 Single—Chip Transceiver PIN ASSIGNMENT • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality FUNCTIONAL BLOCKS • Onboard line interface for clock/data recovery and waves haping • 32-bit or 128-bit jitter attenuator

DS2151Q

Abstract: DS2153 DS2153Q DS2153QN RG802 TS16
Contextual Info: DS2153Q DS2153Q E1 Single–Chip Transceiver FEATURES PIN ASSIGNMENT • Complete E1 CEPT PCM–30/ISDN–PRI transceiver FUNCTIONAL BLOCKS LONG & SHORT HAUL LINE INTERFACE line interface for clock/data recovery and waveshaping • 32–bit or 128–bit jitter attenuator

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS2153Q E1 S in g le -C h ip Transceiver PIN ASSIGNMENT • Com plete E1 CEPT P C M -3 0/IS D N -P R I transceiver functionality F U N C T IO N A L BLO C K S nnnnnnnnnnn • Onboard line interface for clock/data recovery and

Contextual Info: DS2153Q DALLAS SEMICONDUCTOR E1 Single-Chip Transceiver PIN ASSIGNMENT FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality Functional Blocks • Onboard line interface for clock/data recovery and waveshaping • 32-bit or 128-bit jitter attenuator

RG802

Contextual Info: DS2153Q E1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete E1 CEPT PCM-30/ISDN-PRI Transceiver Functionality On-Board Line Interface for Clock/Data Recovery and Waveshaping 32-Bit or 128-Bit Jitter Attenuator Generates Line Build-Outs for Both 120Ω

44-PIN

Abstract: DS2151QT1 DS2153 DS2153Q DS2153QN TS16 RS-433
Contextual Info: DS2153Q DALLAS s e m ic o n d u c to r FEATURES DS2153Q E1 Single—Chip Transceiver PIN ASSIG NM ENT • C om plete E1 CEPT P C M -3 0 /IS D N -P R I transceiver functionality F U N C T IO N A L B LO C K S • O nboard line interface for clock/data recovery and

DS2153Q

Abstract: DS2186 PM4341 T7290 TEW5362 TEW5362-1 TEW5362-2
Contextual Info: CEPT/T1 TEW5362 Output Transformer TEW5362 is is designed and approved to be used as a transmit transformer in T1/CEPT applications with the following devices: – Dallas DS2186 DS2153Q – PMC-Sirerra PM4341 T1X PM6431 E1 – AT&T T7290 Typical applications are:

riro

Abstract: 44-PIN DS2151QT1 DS2153 DS2153Q DS2153QN TS16 IMR11
Contextual Info: DS2153Q DALLAS SEMICONDUCTOR FEATURES DS2153Q E1 Single-Chip Transceiver PIN ASSIG NM ENT • C om plete E1 CEPT P C M -3 0 /IS D N -P R I transceiver functionality F U N C T IO N A L B LO C K S • O nboard line interface for clock/data recovery and w aveshaping

P22328

Abstract: P22157 p22230 mar 9746
Contextual Info: RELIABILITY MONITOR PROCESS: 0.8 µm Double Poly, Single Metal STRESS: INFANT LIFE MONITOR DATE ASSEMBLY PRODUCT REV DATE JOB NO CODE FACILITY LOT NO. DS2153 A7 JUN '98 P22294 9740 ANAM-KOREA AICL DN725561AAB 44 PIN PLCC 48 237 DS2153Q A7 MAR '98 P22292

P22157

Abstract: P21637 9744 P2220 P22200 P22123 208mil
Contextual Info: RELIABILITY MONITOR PROCESS: 0.8 µm Double Poly, Single Metal STRESS: INFANT LIFE MONITOR DATE ASSEMBLY PRODUCT REV DATE JOB NO CODE FACILITY LOT NO. DS2153 A7 JUN '98 P22294 9740 ANAM-KOREA AICL DN725561AAB 44 PIN PLCC 48 237 DS2153Q A7 MAR '98 P22292

AN348

Abstract: DS2153 DS2153Q DS2154 DS2154L RC32 TC32
Contextual Info: Maxim > App Notes > TELECOM Keywords: single chip transceivers, SCTs, difference of DS2154 and DS2153, DS0 monitor, per channel loopback, hardware based signaling, signaling freeze Feb 21, 2002 APPLICATION NOTE 348 DS2154L vs. DS2153Q Abstract: This application note highlights the differences between the DS2154L and the DS2153Q E1 single chip

DS2153Q

Abstract: DS2154L RC32 TC32 TS16
Contextual Info: Application Note 348 DS2154L vs. DS2153Q 1.0 INTRODUCTION This application note highlights the differences between the DS2154L and the DS2153Q E1 Single Chip Transceivers. The DS2154L is a superset of the DS2153Q. All of the original features of the DS2153Q

44-PIN

Abstract: DS2151Q DS2153 DS2153Q DS2153QN TS16 RCr20 resistors
Contextual Info: DS2153Q E1 Single-Chip Transceiver www.dalsemi.com PIN ASSIGNMENT ELASTIC STORES FRAMER LONG & SHORT HAUL LINE INTERFACE FUNCTIONAL BLOCKS PARALLEL CONTROL PORT DALLAS DS2153Q E1 SCT 40 41 42 43 1 44 2 3 4 7 39 31 16 30 17 29 28 32 15 27 33 14 26 34 13 25

Contextual Info: DALLAS DS2153Q Single—Chip Transceiver s e m ic o n d u c to r PIN ASSIGNMENT FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality FUNCTIONAL BLOCKS n (Z IZ IZ • Onboard line interface for clock/data recovery and waveshaping • 32 -bit or 128-bit jitter attenuator

Contextual Info: DS2153Q P R E L IM IN A R Y DALLAS SEMICONDUCTOR DS2153Q E1 S ingle-C hip Transceiver PIN ASSIGNMENT FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality Functional Blocks • Onboard line interface for clock/data recovery and waveshaping

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS2153Q E1 S in g le -C h ip Transceiver PIN ASSIGNMENT • Com plete E1 CEPT P C M -3 0/IS D N -P R I transceiver functionality F U N C T IO N A L B L O C K S nnnnnnnnnnn • Onboard line interface for clock/data recovery and

Contextual Info: DALLAS DS2153Q E1 Single-Chip Transceiver SEMICONDUCTOR PIN ASSIGNMENT FEATURES • Complete E1 CEPT PCM-30/ISDN-PRI transceiver functionality FUNCTIONAL BLOCKS naan. • Onboard line interface for clock/data recovery and waveshaping • 32-bit or 128—bit jitter attenuator