DO07 Search Results

T5CD

Contextual Info: U M C U M 2661 Enhanced Programmable Communications Interface EPCI Features • Automatic serial echo mode (échoplex) ■ Local or remote maintenance loop back mode Baudrate: de to IM bps (1X clock) - de to 62.5K bps (16X clock) - de to 15.625K bps (64X clock)

Contextual Info: IDT54/74FCT377 IDT54/74FCT377A IDT54/74FCT377C FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • IDT54/74FCT377 equivalent to FAST speed The IDT54/74FCT377/A/C is an octal D flip-flop built using

p5cn

Contextual Info: “ DS80C390 Dual CAN High-Speed Microprocessor m m c o m m c tm PIN ASSIGNMENT FEATURES • 80C52 compatible - 8051 instruction-set compatible - Five 8-bit I/O ports - Three 16-bit timer/counters - 256 bytes scratchpad RAM ■ High-Speed Architecture - 4 clocks/machine cycle 8051=12

LVDS 51 connector

Abstract: M130 V23814-U1306-M130 V23815-U1306-M130 fiber array mt
Contextual Info: Fiber Optics Parallel Optical Link: PAROLI Tx AC, 1.6 Gbit/s Parallel Optical Link: PAROLI ® Rx AC, 1.6 Gbit/s V23814-U1306-M130 V23815-U1306-M130 Features • Power supply 3.3 V • Low voltage differential signal electrical interface LVDS • 12 electrical data channels

DIODE 1334 smd

Abstract: S-Sn63Pb37E 9435 72 M130 lvds 26 pin V23814-U1306-M130 V23815-U1306-M130 DI10P DIODE 709 1334 do12-p
Contextual Info: V23814-U1306-M130 Parallel Optical Link: PAROLI Tx AC, 1.6 Gbit/s V23815-U1306-M130 Parallel Optical Link: PAROLI Rx AC, 1.6 Gbit/s Preliminary Dimensions in mm inches A (58.1) 2.287 A—A (1.5) .059 Reference point for case temperature measurement (center of fin width)

lh5s4

Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

BT8070

Abstract: BT8071 BT806 A311D
Contextual Info: Bt8071A Distinguishing Features • Sim plifies ISD N /D M I Im plem entation. • Provides up to 32 Full-D uplex C hannels W ith H D LC /SD L C Protocol Form atting. • Provides Fully Program m able H yperchannel C onfiguration. • Supports All F our DMI

P80A49H

Abstract: 8035HL F1L 250 V fuse BPK-70 interfacing 8275 crt controller with 8086 i8282 hall marking code A04 Transistor AF 138 DK55 82720 intel
Contextual Info: COMPONENT DATA CATALOG JANUARY 1982 Intel C orporation makes no w arranty fo r the use of its products and assumes no re sponsib ility fo r any e rrors w hich may appear in th is docum ent nor does it make a com m itm ent to update the info rm atio n contained herein.

Contextual Info: V23814-U1306-M136 Parallel Optical Link: PAROLI Tx AC, 1.6 Gbit/s V23815-U1306-M136 Parallel Optical Link: PAROLI® Rx AC, 1.6 Gbit/s APPLICATIONS Telecommunication • Switching equipment • Access network Data Communication • Interframe rack-to-rack

84512-202

Abstract: card fci DO-03 OIF-VSR4-01 paroli V23832-R511-M101 V23832-T2531-M101 mt 3328
Contextual Info: Fiber Optics Parallel Optical Link Transmitter: PAROLI 2 Tx AC, 1.25 Gbit/s Parallel Optical Link Receiver: PAROLI® 2 Rx AC, 1.25 Gbit/s V23832-T2531-M101 V23832-R511-M101 Design Benefits • • • • • Relieve system bandwidth bottle necks Simplifies system design

T1431

Abstract: GR-253-CORE V23832-R411-M1 V23832-T1431-M1
Contextual Info: V23832-T1431-M1 Parallel Optical Link Transmitter: PAROLI 2T Tx AC, 2.7 Gbit/s V23832-R411-M1 Parallel Optical Link Receiver: PAROLI®2T Rx AC, 2.7 Gbit/s Preliminary Dimensions in mm PAROLI 2T Tx PAROLI 2T Rx • Transmission data rate of up to 2700 Mbit/s per channel,

AD-12

Abstract: CIET TC6710 TC571000AD 22A16 a54 cms AD12
Contextual Info: 131,072 W ORD X 8 BIT CM OS UV ERASABLE AND ELECTRICALLY PROGRAM M ABLE READ ON LY M EM O RY DESCRIPTION The TC671000AD /TC571001AD ia a 131,072 word X 8 bit CMOS ultraviolet light eraiable and electrically programmable read only memory. The TC571000AD it JEDEC standard pin configuration and th* TC571001AD is compatible

Z80180 technical manual

Contextual Info: Zilog P ro d u c t S p e c ific a tio n January 1989 Z80180 Z180 M PU FEATURES: • • • • • • Operating Frequency to 10 MHz On-Chip MMU Supports Extended Address Space Two DMA Channels On-Chip Wait State Generators Two UART Channels Two 16-Bit Timer Channels

KDS 32kHZ crystal

Abstract: 82C602 opti 82c602 mc146818B ppm 82C465MV KDS 32.768 KHz crystal for RTC FS 8860 kds 5 a - 32,768Khz quartz kds kds 5 a 32,768Khz
Contextual Info: OPTi Inc. OPTi 2525 Walsh Avenue Santa Clara, CA 95051 408 980-8178 Fax: (408) 980-8860 Applications Note Product Name: Title: Date: 82C602 Notebook Companion Chip Description of the 82C602 in Notebook Mode

SES14

Abstract: 45418 MCY4 si6334 SC375
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA , MC141535 LCD Segment / Common Driver CMOS M C141535 is a CM O S LC D D river which co nsists of 4 annunciátor out­ puts and 178 high voltage LC D drtvingsignals 17 ro w sa n d 1 6 1 s8 g m e rts . It h as parallel interface capability for operating with general M CU. B esid es

80c85

Abstract: IC 8212 5962R9581801QJC 5962R9581801QXC 5962R9581801VJC 5962R9581801VXC HS-80C85RH HS-82C12RH intersil 8212 CERAMIC FLATPACK
Contextual Info: HS-82C12RH Radiation Hardened 8-Bit Input/Output Port March 1996 Features Functional Diagram • Devices QML Qualified in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95818 and Intersil’ QM Plan

5962R9581801QJC

Abstract: 5962R9581801QXC 5962R9581801VJC 5962R9581801VXC HS-80C85RH HS-82C12RH 108RAD
Contextual Info: HS-82C12RH S E M I C O N D U C T O R Radiation Hardened 8-Bit Input/Output Port March 1996 Features Functional Diagram • Devices QML Qualified in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95818 and Harris’ QM Plan

74153 mux

Abstract: 82c822 Opti chipset 82C465 pin diagram of 74153 81 pin out diagram of 74138 ic 82C465MV ic 74138 Cyrix 486 dx2 IC 3-8 decoder 74138 pin diagram
Contextual Info: OPTi 82C465MV/MVA/MVB Single-Chip Mixed Voltage Notebook Solution Data Book Revision 2.0 912-3000-016 April, 1995 Copyright Copyright 1995, 1996, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed,

M87C51

Contextual Info: MSWAM<SB OMIF S>IRIiMTO N M87C51FC CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 32 KBYTES USER PROGRAMMABLE EPROM Military M87C51FC—3.5 MHz to 12 MHz, VCc = 5V±20% M87C51FC-1—3.5 MHz to 16 MHz, Vcc = 5V + 20% • High Performance CHMOS EPROM ■ Three 16-Bit Timer/Counters

Contextual Info: MOTOROLA MC6859 A dvance Information MOS DEPLETION LOAD N-CHANNEL, SILICON-GATE DATA SECURITY DEVICE DATA SECURITY DEVICE The M C6859 Data S e curity Device (D S D ) is a m o n o lith ic M O S in ­ te g ra te d c irc u it designed to be in teg rated in to a w id e range o f e q u ip ­

EF6802

Abstract: EF68B02 EF6802CV EF6800P EF68A02 ef6802c EF802 EF6808 f6802 SBC31
Contextual Info: S fi S - T HÖMS ON f l 7D D 7 TS TE 37 EF6802*EF6808 COMPONENTS M IC R O P R O C E S S O R W ITH C LO C K AND O P T IO N A L RAM 3 3 S The E F6 8 0 2 is a monolithic 8-bitmicroprocessor that contains ail the registers and accumulators of the present E F 6 8 0 0 p lu s an internal

trc 9500

Abstract: F68A08 i 2708 i2708 F8802
Contextual Info: NATL SEHICOND -CUP/LIO OEE D • bSQHSfi D0b53SS 0 I T6802/F6882/F680S Microprocessor with Clock and RAM ; Microprocessor Product Description Connection Diagram The F6802/F6882 Is a monolithic 8-bit microprocessor that contains ail the registers and accumulators of the

Z80 dart

Abstract: Z8400AB1 HALL EFFECT 21l Z8400 4mhz Z80A dart Z8470AB1 Z84COO Z8470 z8400a simple door alarm circuit diagram
Contextual Info: Z80 MICROPROCESSOR FAMILY 1th EDITION JANUARY 1990 USE IN LIFE SUPPORT DEVICES FOR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF SGS-THOMSON

FD506

Contextual Info: FSA506 AMP506 FSA0AC197A FSA506 AMP506 Preliminary Specification Version 0.3 Date: 2007/06/02 Prepared by: Y.C. Lee 0 Revise History Date Version Description Owner 2007/03/08 V 0.1 Initialized Release Y.C. 2007/04/27 V 0.2 Register setting Y.C. 2007/06/02