DM54ALS13 Search Results

DM74ALS133M

Abstract: DM74ALS DM74ALS133N J16A M16A N16A
Contextual Info: DM54ALS133/DM74ALS133 13-Input NAND Gate General Description Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart Improved AC performance over Schottky and low pow­

Contextual Info: i g n National /2 /æ Semiconductor Æ iÆ Corporation PRELIMINARY DM54ALS136/DM74ALS136 Quad 2-lnput Exclusive-OR Gates with Open-Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic exclusive-OR function. The open-coilector outputs require external pull-up resistors for proper logi­

DM54ALS138J

Contextual Info: 00 co O T National KA Semiconductor DM54ALS138/DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­ cations, requiring very short propagation delay times. In

DM54ALS137J

Abstract: DM74ALS DM74ALS137M DM74ALS137N J16A M16A N16A
Contextual Info: DM54ALS137/DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS137 is a three line to eight line decoder/demulti­ plexer with latches on the three address inputs. When the latch-enable input 3L is low, the ALS137 acts as a decod­

Contextual Info: NATIONAL SEUICOND {LOGIC} IDE D | b S D l i a S 001313475 7 | D £ Uì R K | National Semiconductor d M i Corporation > s> CO CO DM54ALS133/DM74ALS133 13-Input NAND Gate •v. O !> Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky

DM54ALS132J

Abstract: DM74ALS DM74ALS132M DM74ALS132N J14A M14A N14A
Contextual Info: Corporation DM54ALS132/DM74ALS132 Quad 2-Input NAND Gates with Schmitt Trigger Inputs General Description Features This device contains four independent gates, each of which performs the logic NAND function. Each input has hystere­ sis which increases the noise immunity and transforms a

DM54ALS131J

Abstract: DM74ALS DM74ALS131M DM74ALS131N J16A M16A N16A
Contextual Info: DM54ALS131/DM74ALS131 National Semiconductor Corporation DM54ALS131/DM74ALS131 3 to 8 Line Decoder/Demultiplexer with Address Register General Description Features The ALS131 is a three-line to eight-line decoder/demulti­ plexer with registers on the three address inputs. When the

h16a

Abstract: 41010I
Contextual Info: NATIONAL SEMICOND {LOGIC} 10 E » | bSDIISS 00fc,b4flE T | 7 “- '«2/ -JT5- DM54ALS137/DM74ALS137 3 to 8 Line Decoder/Demultiplexer with Address Latches General Description Features The ALS137 Is a three line to eight line decoder/demulti­ plexer with latches on the three address inputs. When the

DM54ALS136J

Abstract: DM74ALS DM74ALS136M DM74ALS136N J14A M14A N14A
Contextual Info: PRELIMINARY DM54ALS136/DM74ALS136 Quad 2-Input Exclusive-OR Gates with Open-Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic exclusive-OR function. The open-collector outputs require external pull-up resistors for proper logi­

Contextual Info: NATIONAL SEflICOND {LOGIC} 31E D b5011S2 □ □ h cj n i 5 00 co T~ú> 6 - 3 U -5 & National SlA Semiconductor DM54ALS138/DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­

ALS138

Abstract: DM54ALS138J DM74ALS DM74ALS138M DM74ALS138N J16A M16A N16A Scans-0044140
Contextual Info: DM54ALS138/DM74ALS138 National Semiconductor Corporation DM54ALS138/DM74ALS138 3 to 8 Line Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing appli­ cations, requiring very short propagation delay times. In

Contextual Info: DM54ALS131/DM74ALS131 NATIONAL SEMICOND CLOCICJ IDE D| 1=501122 D0bb4?3 Af Y J fk National /Z /m Semiconductor m Jm Corporation DM54ALS131/DM74ALS131 3 to 8 Line Decoder/Demultiplexer with Address Register General Description Features The ALS131 is a three-line to etght-line decoder/demulti­

DM54ALS13J

Abstract: DM74ALS DM74ALS13M DM74ALS13N J14A M14A N14A DM74ALS13
Contextual Info: DM54ALS 13/DM 74ALS13 Dual 4-Input NAND Gates with Schmitt Trigger Inputs General Description Switching specifications guaranteed over full tempera­ ture and V cc range Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin-for-pin compatible with Schottky