DIVIDE-BY-N COUNTER TRIGGER Search Results

Contextual Info: M MOTOROLA. SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 90, S N 54/74LS 92 and S N 54/74LS 93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or

Contextual Info: g MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The S N 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec­ tion and either a divide-by-five (LS290) or divide-by-eight (LS293) section

14569B

Abstract: MC14568 948F MC14526B MC14568B MC14569B MC14569BCP MC14569BDT MC14569BDW MC14569
Contextual Info: MC14569B Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter The MC14569B is a programmable divide–by–N dual 4–bit binary or BCD down counter constructed with MOS P–channel and N–channel enhancement mode devices complementary MOS in a monolithic structure.

Contextual Info: MC14569B Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter The MC14569B is a programmable divide−by−N dual 4−bit binary or BCD down counter constructed with MOS P−Channel and N−Channel enhancement mode devices complementary MOS in a monolithic structure.

14569b

Abstract: MC14522B MC14569B BCD counter
Contextual Info: MC14569B Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter The MC14569B is a programmable divide–by–N dual 4–bit binary or BCD down counter constructed with MOS P–channel and N–channel enhancement mode devices complementary MOS in a monolithic structure.

78 MOS

Abstract: MC14563 MC14563b MC14569B BCD counter circuit diagram max plus MC14526B MC14522B MC14568B MC14XXXBCL BCD counter
Contextual Info: g M O TO R O LA PROGRAMMABLE DIVIDE-BY-N DUAL 4-BIT B IN A R Y /B C D DOWN COUNTER L SUFFIX CERAMIC CASE 620 The MC14569B is a programmable divide-by-N duaf'4-bit binary or BCD down counter constructed with MOS P-channel and N-channel enhancement mode devices {complementary MOS) in a mono­

DIVIDE-BY-60

Abstract: 14566B ETR10
Contextual Info: H D 14566B In d ustrial Tim e B ase G enerator T he H D 14566B industrial tim e base generator consists of a divide-by-10 ripple cou n ter and a divide-by-5 or divide-by-6 ripple co u n ter to perm it stable tim e generation from a 50 or 60Hz line. By cascading this device as divide-by-60 counter to p erm it stable

Contextual Info: 4566B INDUSTRIAL TIM E BASE GENERATOR D E S C R IP T IO N — The 4556B is an Industrial Time Base Generator consisting of a Divide by 10 Ripple Counter, a Divide by 5 or 6 Ripple Counter, and an on-chip Monostable Multivibrator w ith a fixed output pulse width range.

MC14569

Abstract: IC MC14011 IC MC14011 motorola MC14568 MC14568B "MOTOROLA CMOS LOGIC DATA" MC14011 MC14522B BCD counter MC14569B
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14569B Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter L SUFFIX CERAMIC CASE 620 The MC14569B is a programmable divide–by–N dual 4–bit binary or BCD down counter constructed with MOS P–channel and N–channel enhancement mode devices complementary MOS in a monolithic structure.

AN6374

Abstract: CD4059A HARRIS CD4059A CD4000B CD74HC4059 CD74HC4059E HC4059 hct4059 21j4
Contextual Info: [ /Title CD74 HC4059 /Subject (HighSpeed CMOS Logic CMOS Pro- CD74HC4059 Data sheet acquired from Harris Semiconductor SCHS206 High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 Features Description • Synchronous Programmable ÷N Counter N = 3 to 9999

pj 999 diode

Abstract: AT/pj 999 diode
Contextual Info: m CD74HC4059 a r r is High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter F ebru ary 1998 Features • Description Synchronous Programmable or 15999 Counter N = 3 to 9999 • Presettable Down-Counter • Fully Static Operation • Mode-Select Control of Initial Decade Counting

14018B

Abstract: MC14018BCP CD4018B MC14018B MC14018BD MC14018BDR2 MC14018BF MC14018BFEL
Contextual Info: MC14018B Presettable Divide-By-N Counter The MC14018B contains five Johnson counter stages which are asynchronously presettable and resettable. The counters are synchronous, and increment on the positive going edge of the clock. Presetting is accomplished by a logic 1 on the preset enable input.

MC14018BCP

Abstract: MC14018B CD4018B MC14018BD MC14018BDR2 MC14018BF MC14018BFEL
Contextual Info: MC14018B Presettable Divide-By-N Counter The MC14018B contains five Johnson counter stages which are asynchronously presettable and resettable. The counters are synchronous, and increment on the positive going edge of the clock. Presetting is accomplished by a logic 1 on the preset enable input.

MC14018B

Contextual Info: MC14018B Presettable Divide-By-N Counter The MC14018B contains five Johnson counter stages which are asynchronously presettable and resettable. The counters are synchronous, and increment on the positive going edge of the clock. Presetting is accomplished by a logic 1 on the preset enable input.

HC4059

Abstract: CD4000B CD4059A CD54HC4059 CD54HC4059F3A CD74HC4059E 74HC4059
Contextual Info: [ /Title CD74 HC4059 /Subject (HighSpeed CMOS Logic CMOS Pro- CD54/74HC4059 Data sheet acquired from Harris Semiconductor SCHS206A High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 - Revised May 2000 Features Description • Synchronous Programmable ÷N Counter N = 3 to 9999

BY112

Contextual Info: TTL INTEGRATED CIRCUITS DECADE, D IV ID E BY 112, A N D BIN A RY COUNTER GENERAL DESCRIPTION This monolithic counter contains four m aster -slave flip flops and additional Haling to provide a d iv id e-b y -tw o counter and a three-stage binary counter for w hich the count cycle length is divide by six.

CD4059A HARRIS

Abstract: BCD DIVISION J3 diode
Contextual Info: CD74HC4059 Semiconductor High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 Description Features • Synchronous Programmable or 15999 Counter N = 3 to 9999 The Harris CD74HC4059 are high-speed silicon-gate devices that are pin-compatible with the CD4059A devices of

cd4059a

Abstract: an6374
Contextual Info: [ /Title CD74 HC4059 /Subject (HighSpeed CMOS Logic CMOS Pro- CD54/74HC4059 Data sheet acquired from Harris Semiconductor SCHS206A High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 - Revised May 2000 Features Description • Synchronous Programmable ÷N Counter N = 3 to 9999

hc4059

Abstract: an6374 Harris Semiconductor 882 CD4000B series 74*4059 UHF AM Transceiver IC CD4059A HARRIS CD4059A SCHS206A
Contextual Info: [ /Title CD74 HC4059 /Subject (HighSpeed CMOS Logic CMOS Pro- CD54/74HC4059 Data sheet acquired from Harris Semiconductor SCHS206A High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 - Revised May 2000 Features Description • Synchronous Programmable ÷N Counter N = 3 to 9999

MC14018B

Abstract: CD4018B MC14018 MC14XXXBCL MC14XXXBCP MC14XXXBD
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14018B Presettable Divide-By-N Counter L SUFFIX CERAMIC CASE 620 The MC14018B contains five Johnson counter stages which are asynchronously presettable and resettable. The counters are synchronous, and increment on the positive going edge of the clock.

Contextual Info: CD74HC4059 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCHS206 High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 Features Description • Synchronous Programmable ^-N Counter N = 3 to 9999 or 15999 The Harris CD74HC4059 are high-speed silicon-gate

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C14569B Program m able D ivide-B y-N Dual 4 -B it Binary/BCD Down Counter L SUFFIX CERAMIC CASE 620 The MC14569B is a programmable divide-by-N dual 4-b it binary or BCD down counter constructed with MOS P-channel and N-channel enhance­

CD4018B

Abstract: 15-V CD4011B L040 HARRIS CD4018B
Contextual Info: HARRIS ill SEMICOND SECTOR 44E J> m HARRIS CMOS Presettable Divide-By-'N’ Counter H igh-Voltage Types 2 0 -V o lt Rating • C D 4018 8 types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, D A T A , PRESET

CD4059

Contextual Info: [ /Title CD74 HC4059 /Subject (HighSpeed CMOS Logic CMOS Pro- CD54HC4059, CD74HC4059 Data sheet acquired from Harris Semiconductor SCHS206B High-Speed CMOS Logic CMOS Programmable Divide-by-N Counter February 1998 - Revised May 2003 Features Description