2010 - SODIMM ddr3 204
Abstract: JTF8C128
Text: list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module , 1GB, 2GB, 4GB (x64, SR) 204-Pin DDR3 SODIMM Features DDR3 SDRAM SODIMM MT8JTF12864HZ â 1GB MT8JTF25664HZ â 2GB MT8JTF51264HZ â 4GB Features Figure 1: 204-Pin SODIMM (MO-268 R/C B) ⢠DDR3 , ¢ Frequency/CAS latency â 1.25ns @ CL = 11 ( DDR3 -1600) â 1.5ns @ CL = 9 ( DDR3 -1333) â 1.87ns @ CL = 7 ( DDR3 -1066) None Z -1G6 -1G4 -1G1 Table 1: Key Timing Parameters Data Rate (MT/s) Speed
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204-Pin
MT8JTF12864HZ
MT8JTF25664HZ
MT8JTF51264HZ
MO-268
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
SODIMM ddr3 204
JTF8C128
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2009 - micron ddr3
Abstract: No abstract text available
Text: all possible pins for all DDR3 modules. All pins listed may not be supported on this module. See Pin , at the I/O pins . A single read or write access for the DDR3 SDRAM module effectively consists of a , n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use two sets of differential , 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 VLP RDIMM Features DDR3 SDRAM VLP RDIMM MT18JDF25672PZ 2GB MT18JDF51272PZ 4GB Features · DDR3 functionality and operations supported as defined in the
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240-Pin
MT18JDF25672PZ
MT18JDF51272PZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83a06a34
jdf18c256
micron ddr3
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2009 - MT18JSF25672PZ
Abstract: MT18JSF51272PZ-1G9
Text: for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , data words per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module , eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use , 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 RDIMM Features DDR3 SDRAM RDIMM MT18JSF25672PZ 2GB MT18JSF51272PZ 4GB Features · DDR3 functionality and operations supported as defined in the component data
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240-Pin
MT18JSF25672PZ
MT18JSF51272PZ
240-pin,
PC3-14900,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef8394fb39
MT18JSF25672PZ
MT18JSF51272PZ-1G9
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2009 - MT41J256m8
Abstract: No abstract text available
Text: below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may not be , per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module effectively , corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use two sets of , 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 VLP RDIMM Features DDR3 SDRAM VLP RDIMM MT18JDF25672PDZ 2GB MT18JDF51272PDZ 4GB Features · DDR3 functionality and operations supported as defined in the
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240-Pin
MT18JDF25672PDZ
MT18JDF51272PDZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef837c3c22
jdf18c256
MT41J256m8
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2009 - MT18KSF25672PZ
Abstract: No abstract text available
Text: for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and , 2GB, 4GB (x72, ECC, SR) 240-Pin 1.35V DDR3 RDIMM Features 1.35V DDR3 SDRAM RDIMM MT18KSF25672PZ , @ CL = 11( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3 -1066) 1.87ns @ CL = 8 ( DDR3 -1066)1 2.5ns @ CL = 5 ( DDR3 -800)1 2.5ns @ CL = 6 ( DDR3 -800)1 Note: Marking None Z -1G6
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240-Pin
MT18KSF25672PZ
MT18KSF51272PZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83ad1229
ksf18c256
MT18KSF25672PZ
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2007 - Not Available
Abstract: No abstract text available
Text: below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may not be , the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and , 1GB, 2GB (x64, SR) 240-Pin DDR3 SDRAM UDIMM Features DDR3 SDRAM UDIMM MT8JTF12864AY 1GB MT8JTF25664AY 2GB Features · DDR3 functionality and operations supported as defined in the component data , ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3 -1066) 1.87ns @ CL = 8 ( DDR3 -1066)2
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240-Pin
MT8JTF12864AY
MT8JTF25664AY
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef82b21119
jtf8c128
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2010 - LFE3- 17EA- 6FN484C
Abstract: vhdl code for ddr3 LFE3-17EA ddr3 controller JESD79-3C DDR3 jedec JESD79-3C micron ddr3 1Gb LFE3-35EA LFE335EA6FN484C LFE3-35Ea-6FN484
Text: Double Data Rate ( DDR3 ) SDRAM Controller IP Core User's Guide July 2010 IPUG80_01.1 Table , . 8 DDR3 I/O Modules , change without notice. IPUG80_1.1, July 2010 2 DDR3 SDRAM Controller IP Core User's Guide , . 28 Memory I/F Pins . 28 User I/F Pins
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IPUG80
R111C180D
R75C180D
R75C2D
R66C2D
R66C180D
R57C2D
R57C180D
R48C2D
R48C180D
LFE3- 17EA- 6FN484C
vhdl code for ddr3
LFE3-17EA
ddr3 controller
JESD79-3C
DDR3 jedec JESD79-3C
micron ddr3 1Gb
LFE3-35EA
LFE335EA6FN484C
LFE3-35Ea-6FN484
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2009 - MT72JSZS4G72PZ-1G1
Abstract: No abstract text available
Text: list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module , data transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture , pins not under test = 0V) Module ambient operating temperature DDR3 SDRAM component case operating , 16GB, 32GB (x72, ECC, QR) 240-Pin DDR3 RDIMM Features DDR3 SDRAM RDIMM MT72JSZS2G72PZ - 16GB MT72JSZS4G72PZ - 32GB Features · DDR3 functionality and operations supported as defined in the component data
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240-Pin
MT72JSZS2G72PZ
MT72JSZS4G72PZ
240-pin,
PC3-10600,
PC3-8500,
PC3-6400
c8-3900
09005aef83a81483
jszs72c2g
MT72JSZS4G72PZ-1G1
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2009 - jedec package MO-269
Abstract: DDR3 jedec 21-c MO-269 MT18JSF51272 DDR3 RDIMM SPD JEDEC MT41J256M4 "DDR3 SDRAM" TN-04-42 PC3-10600 PC3-12800
Text: DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , data words per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module , eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use , 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 SDRAM RDIMM Features DDR3 SDRAM RDIMM MT18JS(Z)F25672PZ 2GB MT18JS(Z)F51272PZ 4GB Features Figure 1: 240-Pin RDIMM (MO-269 R/C C) · DDR3
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240-Pin
MT18JS
F25672PZ
F51272PZ
MO-269
240-pin,
PC3-12800,
PC3-10600,
jedec package MO-269
DDR3 jedec 21-c
MT18JSF51272
DDR3 RDIMM SPD JEDEC
MT41J256M4
"DDR3 SDRAM"
TN-04-42
PC3-10600
PC3-12800
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2009 - Not Available
Abstract: No abstract text available
Text: description table below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may , 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 VLP RDIMM Features DDR3 SDRAM VLP RDIMM MT18JDF25672PZ 2GB MT18JDF51272PZ 4GB Features · DDR3 functionality and operations supported as defined in the , -pin DIMM (halogen-free) · Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3 -1066) Marking None Z -1G6 -1G4 -1G1 (ns) 13.125 13.125 13.125 15 15
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240-Pin
MT18JDF25672PZ
MT18JDF51272PZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83a06a34
jdf18c256
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2010 - JEDEC SPD No.21
Abstract: MT9JBF25672AKZ
Text: table below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may not , per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module effectively , corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use two sets of , 2GB (x72, ECC, SR) 244-Pin DDR3 SDRAM ULP Mini-UDIMM Features DDR3 SDRAM ULP Mini-UDIMM MT9JBF25672AKZ 2GB Features · DDR3 functionality and operations supported as defined in the component data
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244-Pin
MT9JBF25672AKZ
244-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83e0c154
jbf9c256x72akz
JEDEC SPD No.21
MT9JBF25672AKZ
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2009 - MICRON ddr3 MT41J64M16
Abstract: MT41J128M16 MT41J64M16 MT4JSF12864HZ-1G4 MT4JSF12864HZ-1G1D1 JSF4C64 MO-268 high density sodimm ddr3 memory MT4JSF12864HZ
Text: for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , VREFCA = VDD/2 (All other pins not under test = 0V) Module ambient operating temperature DDR3 SDRAM , 512MB, 1GB (x64, SR) 204-Pin DDR3 SODIMM Features DDR3 SDRAM SODIMM MT4JSF6464HZ 512MB MT4JSF12864HZ 1GB Features · DDR3 functionality and operations supported as defined in the component data , latency 1.25ns @ CL = 11( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3
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512MB,
204-Pin
MT4JSF6464HZ
512MB
MT4JSF12864HZ
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
MICRON ddr3 MT41J64M16
MT41J128M16
MT41J64M16
MT4JSF12864HZ-1G4
MT4JSF12864HZ-1G1D1
JSF4C64
MO-268
high density sodimm ddr3 memory
MT4JSF12864HZ
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2011 - F413
Abstract: No abstract text available
Text: list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module , transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and , VDD/2 or VREFCA = VDD/2 (All other pins not under test = 0V) Module ambient operating temperature DDR3 , 8GB (x72, ECC, SR) 240-Pin DDR3 RDIMM Features DDR3 SDRAM RDIMM MT18JSF1G72PZ 8GB Features · DDR3 functionality and operations supported as per the component data sheet · 240-pin, registered dual
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240-Pin
MT18JSF1G72PZ
240-pin,
PC3-14900,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef84854d35
jsf18c1gx72pz
F413
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2009 - MT41J128M16
Abstract: MO-268 PIN157 MT41J128M16 decoupling MT4JSF1286 MT4JSF12864HZ-1G4D1
Text: Descriptions The pin description table below is a comprehensive list of all possible pins for all DDR3 modules , internal to the DDR3 SDRAM. When enabled in normal operation, ODT is only applied to the following pins : DQ , per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module effectively , corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use two sets of , 1GB (x64, SR) 204-Pin 1.35V Halogen-Free DDR3 SODIMM Features 1.35V DDR3 SDRAM SODIMM
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204-Pin
MT4KSF12864HZ
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83b09d00
ksf4c128x64hz
MT41J128M16
MO-268
PIN157
MT41J128M16 decoupling
MT4JSF1286
MT4JSF12864HZ-1G4D1
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2011 - MT41J256M16
Abstract: MT41J64M16 MT8JTF51264HDZ-1G4D1
Text: list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module , the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and , 1GB, 4GB (x64, DR) 204-Pin DDR3 SODIMM Features DDR3 SDRAM SODIMM MT8JTF12864HDZ 1GB MT8JTF51264HDZ 4GB Features · DDR3 functionality and operations supported as defined in the component data , ) · Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL =
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204-Pin
MT8JTF12864HDZ
MT8JTF51264HDZ
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef8487099c
jtf8c128
MT41J256M16
MT41J64M16
MT8JTF51264HDZ-1G4D1
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2009 - micron quad die ddr3
Abstract: No abstract text available
Text: list of all possible pins for all DDR3 modules. All pins listed may not be supported on this module , data transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture , 8GB, 16GB (x72, ECC, QR) 240-Pin DDR3 RDIMM Features DDR3 SDRAM RDIMM MT72JDZQ1G72PZ 8GB MT72JDZQ2G72PZ 16GB Features · DDR3 functionality and operations supported as defined in the component data , 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3 -1066) Marking None Z -1G4 -1G1 (ns) 13.125
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240-Pin
MT72JDZQ1G72PZ
MT72JDZQ2G72PZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83ba19dc
jdzq72c1g
micron quad die ddr3
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2009 - Not Available
Abstract: No abstract text available
Text: Descriptions The pin description table below is a comprehensive list of all possible pins for all DDR3 modules , internal to the DDR3 SDRAM. When enabled in normal operation, ODT is only applied to the following pins : DQ , data words per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module , eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use , /2 (All other pins not under test = 0V) Module ambient operating temperature DDR3 SDRAM component
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240-Pin
MT36JSZF51272PDZ
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83950b83
jszf36c512x72pdz
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2012 - IPUG96
Abstract: No abstract text available
Text: DDR3 PHY IP Core Userâs Guide March 2012 IPUG96_01.1 Table of Contents Chapter 1 , . 7 DDR3 I/O Logic , are subject to change without notice. IPUG96_01.1, March 2012 2 DDR3 PHY IP Core Userâs , . 22 DDR3 SDRAM Memory Clock Pin Location , . 23 Memory I/F Pins
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IPUG96
R42C145D
LatticeECP3-70
FPBGA1156
FPBGA672
FPBGA484
LatticeECP3-35
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2010 - DDR3 4gb jedec spd byte
Abstract: No abstract text available
Text: DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for information , transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and , 4GB (x72, ECC, DR) 244-Pin DDR3 SDRAM Mini-UDIMM Features DDR3 SDRAM Mini-UDIMM MT18JSF51272AKZ 4GB Features · DDR3 functionality and operations supported as defined in the component data sheet , Mini-UDIMM · Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL
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244-Pin
MT18JSF51272AKZ
244-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83e724a3
jsf18c512x72akz
DDR3 4gb jedec spd byte
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2007 - MT8JSF12864HY-1G1B1
Abstract: DDR3 SPD sensor 204 pin so-DIMM DDR3 connector
Text: for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , data transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture , 1GB, 2GB (x64, SR) 204-Pin DDR3 SDRAM SODIMM Features DDR3 SDRAM SODIMM MT8JSF12864H 1GB MT8JSF25664H 2GB Features · DDR3 functionality and operations supported as defined in the component data , Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL = 7 ( DDR3
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204-Pin
MT8JSF12864H
MT8JSF25664H
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef82b36df5
jsf8c128
MT8JSF12864HY-1G1B1
DDR3 SPD sensor
204 pin so-DIMM DDR3 connector
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2008 - MT41J512M4THR
Abstract: 2Gb DDR3 SDRAM twindie "DDR3 SDRAM" ddr3 240 pin SSTE32882 PC3-12800 DDR3-1066 DDR3-1333 PC3-10600 JEDEC SPD No.21
Text: DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , data words per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module , eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use , 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM Features DDR3 SDRAM VLP RDIMM MT36JBZS51272PY 4GB Features Figure 1: 240-Pin VLP RDIMM (ATCA-Compatible R/C N) · DDR3 functionality and
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240-Pin
MT36JBZS51272PY
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef8328da34
jbzs36c512x72py
MT41J512M4THR
2Gb DDR3 SDRAM twindie
"DDR3 SDRAM"
ddr3 240 pin
SSTE32882
PC3-12800
DDR3-1066
DDR3-1333
PC3-10600
JEDEC SPD No.21
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2008 - MT18JSF25672AY-1G1D1
Abstract: 240 unbuffered DDR3 MT18JSF25672AY-1G1 DDR3 udimm jedec
Text: description table below is a comprehensive list of all possible pins for all DDR3 modules. All pins listed may , data words per clock cycle at the I/O pins . A single read or write access for the DDR3 SDRAM module , eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use , 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM Features DDR3 SDRAM UDIMM MT18JSF25672AY 2GB MT18JSF51272AY 4GB Features · DDR3 functionality and operations supported as defined in the component data
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240-Pin
MT18JSF25672AY
MT18JSF51272AY
240-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83014429
jsf18c256
MT18JSF25672AY-1G1D1
240 unbuffered DDR3
MT18JSF25672AY-1G1
DDR3 udimm jedec
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2012 - MT18JBZS1G72PKZ
Abstract: No abstract text available
Text: comprehensive list of all possible pins for all DDR3 modules. All pins listed may not be supported on this , data transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture , 8GB (x72, ECC, DR) 244-Pin DDR3 ULP Mini-RDIMM Features DDR3 SDRAM ULP Mini-RDIMM MT18JBZS1G72PKZ 8GB Features · DDR3 functionality and operations supported as defined in the component data , ) · Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3 -1600) 1.5ns @ CL = 9 ( DDR3 -1333) 1.87ns @ CL =
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244-Pin
MT18JBZS1G72PKZ
244-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef84c3ac38
jbzs18c1gx72pkz
MT18JBZS1G72PKZ
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2010 - MT8JSF12864HZ-1G1D1
Abstract: 204 pin so-DIMM DDR3 connector DDR3 SDRAM micron DDR3 architecture MT8JSF12864HZ
Text: for all DDR3 modules. All pins listed may not be supported on this module. See Pin Assignments for , at the I/O pins . A single read or write access for the DDR3 SDRAM module effectively consists of a , n-bit-wide, one-half-clock-cycle data transfers at the I/O pins . DDR3 modules use two sets of differential , 1GB, 2GB (x64, SR) 204-Pin Halogen-Free DDR3 SDRAM SODIMM Features DDR3 SDRAM SODIMM MT8JSF12864HZ 1GB MT8JSF25664HZ 2GB Features · DDR3 functionality and operations supported as defined in
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204-Pin
MT8JSF12864HZ
MT8JSF25664HZ
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef83364a85
jsf8c128
MT8JSF12864HZ-1G1D1
204 pin so-DIMM DDR3 connector
DDR3 SDRAM micron
DDR3 architecture
MT8JSF12864HZ
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2010 - MT16JTF1G64HZ-1G4
Abstract: MT16JTF1G64HZ MT16JTF25664HZ MT16JTF51264HZ-1G4 MT16JTF25664HZ-1G1 MT16JTF1G64HZ-1G1 MT16JTF1G64HZ-1G6 MT16JTF51264HZ-1G6 U12-U15 MT16JTF51264HZ
Text: all possible pins for all DDR3 modules. All pins listed may not be supported on this module. See Pin , data transfers at the I/O pins . DDR3 modules use two sets of differential signals: DQS, DQS# to capture , 2GB, 4GB, 8GB (x64, DR) 204-Pin DDR3 SODIMM Features DDR3 SDRAM SODIMM MT16JTF25664HZ 2GB MT16JTF51264HZ 4GB MT16JTF1G64HZ 8GB Features · DDR3 functionality and operations supported as defined in , A +70°C) · Package 204-pin DIMM (halogen-free) · Frequency/CAS latency 1.25ns @ CL = 11 ( DDR3
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204-Pin
MT16JTF25664HZ
MT16JTF51264HZ
MT16JTF1G64HZ
204-pin,
PC3-12800,
PC3-10600,
PC3-8500,
PC3-6400
09005aef84415efe
MT16JTF1G64HZ-1G4
MT16JTF1G64HZ
MT16JTF25664HZ
MT16JTF51264HZ-1G4
MT16JTF25664HZ-1G1
MT16JTF1G64HZ-1G1
MT16JTF1G64HZ-1G6
MT16JTF51264HZ-1G6
U12-U15
MT16JTF51264HZ
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