DC DC CONVERTER USING FPGA Search Results

Contextual Info: Using the UCC25230EVM-754 User's Guide Literature Number: SLUU670 November 2011 User's Guide SLUU670 – November 2011 1.5-W Forward-Flyback DC-to-DC Converter for 48-V Telecom Biasing Supply 1 Introduction This EVM is to help evaluate the UCC25230 PWM device in a forward-flyback or flyback DC-to-DC

Contextual Info: Using the UCC28250EVM-564 User's Guide Literature Number: SLUU441A September 2010 – Revised October 2011 User's Guide SLUU441A – September 2010 – Revised October 2011 Half-Bridge DC-to-DC Converter With Secondary-Side Control 1 Introduction This EVM is to aid in evaluating UCC28250 PWM device with secondary-side control in DC-to-DC

Contextual Info: Using the UCC28250EVM-501 User's Guide Literature Number: SLUU429B June 2010 – Revised December 2010 User's Guide SLUU429B – June 2010 – Revised December 2010 Half-Bridge DC-to-DC Converter With Primary-Side Control 1 Introduction This EVM is to help evaluating UCC28250 PWM device with primary-side control in DC-to-DC symmetrical

Contextual Info: THV3011_Rev.1.00_E THV3011 1ch DC/DC converter Description Features THV3011 is a synchronous buck switching regulator IC with the external High side Power MOSFET. Available high current power supply using a minimum number of external components, because any

THV5011

Abstract: TSSOP-16pin 360KHz lg ddr sdram converter circuit dc to Dc 40v to 24V switching regulator IC
Contextual Info: THV5011_Rev.1.0_E1 THV5011 1ch DC/DC converter. Description Features THV5011 is a synchronous buck switching regulator IC with the built-in High side Power MOSFET. Available 3A or more current using a minimum number of external components. Any external phase

THV5012

Abstract: 24v 2A regulator soft start
Contextual Info: THV5012_Rev.1.0_E1 THV5012 1ch DC/DC converter. Description Features THV5012 is a synchronous buck switching regulator IC with the built-in High side Power MOSFET. Available 2A or more current using a minimum number of external components. Any external phase

YEV09T06-0

Abstract: L100 SR-332 YEV09T06
Contextual Info: YEV09T06 6A DC-DC POL Converter 4.5V to 13.8V Input • 0.59V to 5.1V Output Data Sheet Member of the Applications • Low voltage, high density systems with Intermediate Bus Architectures IBA • Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessors

SR-332

Abstract: can bus 24v DC-DC Converter
Contextual Info: YEV09T03 3A DC-DC POL Converter 4.5V to 13.8V Input • 0.59V to 5.1V Output Data Sheet Member of the Applications  Low voltage, high density systems with Intermediate Bus Architectures IBA  Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessors

L100

Abstract: SR-332 YEV09T10 YEV09T10-0
Contextual Info: YEV09T10 10A DC-DC POL Converter 4.5V to 13.8V Input • 0.59V to 5.1V Output Data Sheet Member of the Applications • Low voltage, high density systems with Intermediate Bus Architectures IBA • Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessors

dual tracking voltage regulator ic 10A

Abstract: AN95 JMK316BJ106ML LQH32CN2R2M33 LTC3407 LTC3708 LTC3736 Si7540DP DC DC converter 28V 36V HAT2168
Contextual Info: Design Solutions 41 February 2004 Dual Output DC/DC Converter Solutions for Xilinx FPGA Based Systems Charlie Zhao INTRODUCTION Xilinx FPGAs require at least two power supplies: VCCINT for core circuitry and VCCO for I/O interface. For the latest Xilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. In

SR-332

Abstract: Telcordia SR-332
Contextual Info: YEV09T20 20A DC-DC POL Converter 4.5V to 13.8V Input • 0.59V to 5.1V Output Data Sheet Member of the Applications • Low voltage, high density systems with Intermediate Bus Architectures IBA • Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessors

TDS3054

Abstract: eeprom programmer schematic XAPP158 IRF6601 PLD08 PLD08VEB SMT4004 Summit Microelectronics
Contextual Info: Application Note 31 Xilinx VirtexTM-E, SpartanTM-IIE FPGA and SMT4004 TRAKKERTM Supply Manager Reference Design: Procedure and Results Summary BACKGROUND As outlined in Xilinx’s Application Note “XAPP158” and and SpartanTM-IIE data sheets, VirtexTM-E

L100

Abstract: SR-332 YEV09T10
Contextual Info: YEV09T10 10A DC-DC POL Converter 4.5V to 13.8V Input • 0.59V to 5.1V Output Data Sheet Member of the Applications  Low voltage, high density systems with Intermediate Bus Architectures IBA  Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessors

Contextual Info: How to Configure the Tracking and Power Sequencing of FPGAs Introduction The increase of voltage input rails for delivering point-of-load power to DSPs, ASICs, FPGAs and microprocessors is creating more challenges for power supply designers. Especially as system power and

AM503B

Abstract: dual P-Channel JFET "P-Channel JFET" "P-Channel JFETs" AN-31 PLD08 PLD08VEB SMT4004 SST174 XAPP158
Contextual Info: Application Note 34 Lossless Tracking Procedure and Results Summary Reference Design: Xilinx VirtexTM-E, SpartanTM-IIE FPGA and SMT4004 TRAKKERTM BACKGROUND POWER-ON REQUIREMENT The purpose of this Application Note is to present the design and test results of a low cost, highly space

XO1200

Abstract: Analog to Digital Converters XP2-17 real time application of D flip-flop FPGA CIC Filter dc dc converter using fpga
Contextual Info: LEVERAGING FPGA AND CPLD DIGITAL LOGIC TO IMPLEMENT ANALOG TO DIGITAL CONVERTERS A Lattice Semiconductor White Paper March 2010 Lattice Semiconductor 5555 Northeast Moore Ct. Hillsboro, Oregon 97124 USA Telephone: 503 268-8000 www.latticesemi.com 1 Leveraging FPGA and CPLD Digital Logic to Implement Analog to Digital Converters

Contextual Info: Powering FPGAs By Von Johannes Fottner Field Application Engineer, Semtech Corporation Harald Werner, Area Technical Manager, Lattice Semiconductor Abstract Today, FPGAs are widely used universal components that can contain even complex systems on a single

SR-332

Contextual Info: LSM2-T/30-D12 Series www.murata-ps.com DOSA-SMT, 30A POL DC/DC Converters Typical unit FEATURES DESCRIPTION „ Non-isolated Point-of-Load POL converter, ideal for mixed voltage systems „ Optimized for CPUs, DSPs and programmable logic - FPGAs, ASICs „ 30 Amps maximum output current

TRANSISTOR 077

Contextual Info: LSM2-T/30-D12 Series www.murata-ps.com DOSA-SMT, 30A POL DC/DC Converters Typical unit FEATURES DESCRIPTION „Non-isolated Point-of-Load POL converter, ideal for mixed voltage systems „Optimized for CPUs, DSPs and programmable logic - FPGAs, ASICs „30 Amps maximum output current

ISERDES

Abstract: XC6VLX130TFF1156 UG361 DSP48E1 SSTL15 XC6VLX130T XC6VLX760 iodelay vhdl code XC6VLX130T-FF1156
Contextual Info: Virtex-6 FPGA SelectIO Resources User Guide UG361 v1.2 January 18, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the

soft start circuit 555 timer

Abstract: TPS79xxx SOT c5 87 TPS400xx ic 7404 datasheet texas instruments 555 Application note TLC7705 TLC7733 TPS40K TPS3809L30
Contextual Info: R E A L W O R L D Field Programmable Gate Arrays FPGA S I G N A L P R O C E S S I N G Includes: • Power requirements of Xilinx FPGAs in typical applications Texas Instruments Power Management Reference Guide for Xilinx FPGAs • Recommended Texas Instruments DC/DC

Contextual Info: LP3906 Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface General Description Features The LP3906 is a multi-function, programmable Power Management Unit, optimized for low power FPGAs, Microprocessors and DSPs. This device integrates two highly efficient

LP3906SQX-VPFP

Abstract: 06-PPXP LP3906 LP3906SQ-DJXI LP3906SQ-JXXI LP3906SQ-PPXP LP3906SQ-VPFP LP3906SQX-DJXI LP3906SQX-JXXI LP3906SQX-PPXP
Contextual Info: LP3906 Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface General Description Features The LP3906 is a multi-function, programmable Power Management Unit, optimized for low power FPGAs, Microprocessors and DSPs. This device integrates two highly efficient

marking h06

Abstract: 06-JXXI h06 diode LP3906SQ-DJXI LP3906 06-DJXI Marking code H06 marking h08 LLP24
Contextual Info: LP3906 Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface General Description Features The LP3906 is a multi-function, programmable Power Management Unit, optimized for low power FPGAs, Microprocessors and DSPs. This device integrates two highly efficient