DBIT 70 4S Search Results

escc 3201

Abstract: dbit 70 4s DBIT Microspire SMD Microspire Microspire dbit 70 4s Microspire transformer MIL-STD-1553 dbit P400 S400
Contextual Info: 21 MIL-STD 1553 Interface Transformers - DBIT x 3 S ECSS-Q-ST-70-02C Applied standards : ESCC 3201 generic specification for space products • Open-circuit impedance greater than 3 kΩ 4 kΩ typical value from 75 KHz to 1 MHz • Frequency range 75 KHz to 1 MHz

MIL-STD-1553 dbit

Abstract: dbit 70 4s DBIT 49/Microspire dbit 70 4s DBIT 70 7P400 smd code marking LP Microspire dbit 70 4s
Contextual Info: 21 MIL-STD 1553 Interface Transformers - DBIT x 3 S • • • • ECSS-Q-70-02 Open-circuit impedance greater than 3 kΩ 4 kΩ typical value from 75 KHz to 1 MHz Frequency range 75 KHz to 1 MHz Operating temperature range : - 55 °C to + 125 °C Weight : 3 to 3.5 grams

Microspire transformer

Abstract: Microspire MTLM-2056 Transformers MSCI 10000 SESI 91 MPCI 233 100 000 G 10 en61558 Microspire SMD SMD Transistor dj rm ct08 series smd marking m11
Contextual Info: lo o n Wound Magnetics Experts ch d u e T ro l P ia r to t n s u sig d e n D I m d o n a Fr e d ra G gh i H ace p S Aer s e i g io ct tics u a on ® e nc efe D ys a ailw R g Oil in rill ry st ndu D I al c edi M www.microspire.c m n  +HDG2IÀFH0LFURVSLUH

IC SUBSTITUTION

Abstract: RBS 6601
Contextual Info: Lucent Technologies Bell Labs Innovations T7631 Dual T1/E1 Long-Haul Terminator Advance Data Sheet November 1997 m i c r o e l e c t r o n i c s gr o up Lucent Technologies Bell Labs Innovations T7631 DualT1/E1 Long-Haul Terminator Features Short-Haul Features

sb3ca

Abstract: RBS 6601
Contextual Info: microelectronics Lucent Technologies Bell Labs Innovations T7630 Dual T1/E1 Short-Haul Terminator Terminator-ll group Preliminary Data Sheet October 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7630 DualT1/E1 Short-Haul Terminator (Terminator-ll)

Contextual Info: Preliminary Data Sheet October 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7630 DualT1/E1 Short-Haul Terminator Terminator-ll Features • Two independent T1/E1 channels each consisting of aT1/E1 short-haul line interface and aT1/E1

Intel i860

Contextual Info: INTEL CORP UP/PRPHLS bflE » • 4ñ2bl7S Dia^flSb in te i i860 XR 64-BIT MICROPROCESSOR ■ Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per

T7252

Contextual Info: Advance Data Sheet 0 A T & T T7250B User-Network Interface with Enhanced Features for ISDN Terminal Endpoints Enhanced Features Standard Features • Power-down mode of operation less than 7 mW • Supports CCITT I.430/ANSI T1.605 Standard for ISDN 2B+D Basic Access at the S/T reference point

APC UPS es 500 CIRCUIT DIAGRAM

Abstract: POWER SUPPLY BOARD KL 803 52/B APC Back ES 500 UPS CIRCUIT APC Back ES 500 UPS APC be 500 UPS CIRCUIT DIAGRAM APC Back ES 500 UPS circuit diagram ha 13627 APC UPS CIRCUIT DIAGRAM es 725 SAE Capacitor filter Controlled area network P80CE598
Contextual Info: Product specification Philips Semiconductors 8-bit microcontroller with on-chip CAN CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 2 .1 2 .2 Electromagnetic Compatibility EMC Recommendation on ALE 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 PINNING 6 FUNCTIONAL DESCRIPTION

itt capacitor

Abstract: OT112 P8XC552 BST72A CROSS itt canon CB/CA P83CE598FFB 80C51 P80CE598 Clk16MHZ P80CE598FHB
Contextual Info: NAPC/PHILIPS SEMICON» bûE D • bbS3T5H O G W i l 31 0 « S I C B Philips Preliminary specification 8-bit microcontroller with on-chip CAN CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION

SA4-13

Abstract: SA5-27 RHS25
Contextual Info: Device Advisory October 1999 TFRA08C13 Device Advisory for Version 2.0 of the Device Introduction This advisory refers to version 2.0 of the TFRA08C13 Octal T1/E1 Framer. This advisory addresses the timing issue of the microprocessor interface when FDL registers are accessed. This advisory also introduces guidelines for interfacing TFRA08C13 with processors of the Motorola* M68000 family.

SA4-13

Abstract: AUB-13 EFL 231 m25c22
Contextual Info: Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Preliminary Data Sheet November 1998 microelectronics group Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Features Facility Data Link Features • Eight independent T1/E1 transmit and receive

V110

Abstract: AM2110
Contextual Info: a Preliminary Advanced Micro Devices A m 2110 ISDN Terminal Adapter Circuit ITAC DISTINCTIVE CHARACTERISTICS *• ■ ■ Universal adapter for ISDN R reference point ■ Support of async and sync interfaces: X.21, X.21 bis, V.24, RS232C Automatic calling/answering with on-chip

M25C22

Abstract: SA5-27 SA4-13 SA517 Y32-Y33 Y08-Y09 SA515 SA519 Y18-Y19 Y10-Y11
Contextual Info: Preliminary Data Sheet September 2000 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance

RBS 2202

Abstract: Lucent SLC 2000 4558 X data sheet SA4-13 data sheet ic 7495 B20-B2E HDB3 CODING DECODING FPGA SA5-27 5N26 FRM8 relay datasheet
Contextual Info: Preliminary Data Sheet October 2000 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance

M25C22

Abstract: SA4-13 SA5-27
Contextual Info: Preliminary Data Sheet April 2002 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance

M25C22

Abstract: SA4-13 SA5-27 T7115a Y18-Y19 RHS25
Contextual Info: Data Sheet February 2003 TFRA08C133BAL3 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance monitoring:

RBS 2202

Abstract: SA4-13 SA5-27 LC1 D09 10 PR70 SR10 SR12 T7633 TFRA08C13 AMI encoding circuit diagram
Contextual Info: Preliminary Data Sheet May 2002 TFRA08C13 OCTAL T1/E1 Framer Features • Eight independent T1/E1 transmit and receive framers. ■ Internal DS1 transmit clock synthesis—no external oscillator necessary. ■ Comprehensive alarm reporting and performance

Contextual Info: in te * MILITARY i860 64-BIT MICROPROCESSOR Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for

Contextual Info: microelectronics Preliminary Data Sheet November 1998 group Lucent Technologies Bell Labs Innovations TFRA08C13 Octal T1/E1 Framer Features Facility Data Link Features • Eight independent T1/E1 transmit and receive framers. m Internal DS1 transmit clock synthesis—no external

wv3 transistor

Abstract: TRANSISTOR wv4 WV5 43 M68000 MC68060 ba3109 free mbus master pst 39
Contextual Info: Freescale Semiconductor, Inc. TABLE OF CONTENTS Paragraph Number Title Page Number Section 1 Introduction Freescale Semiconductor, Inc. 1.1 Why ColdFire! .1-7 Section 2

motorola v3

Abstract: wv3 transistor M68000 MC68060 verilog code for 8 bit shift register theory verilog code for BIST state machine for 16-byte SRAM
Contextual Info: TABLE OF CONTENTS Paragraph Number Title Page Number Section 1 Introduction 1.1 Why ColdFire! .1-7 Section 2 Architectural Overview Section 3 Version 3 Core 3.1 3.2 3.3 3.3.1

Contextual Info: SIEMENS Extended Line Card Interface Controller ELIC 1 PEB 20550 PEF 20550 Features Switching EPIC®-1 • Non-blocking switch for 32 digital (e.g. ISDN) or 64 voice subscribers - Bandwidth 16, 32, or 64 kbit/s - Two consecutive 64-bit/s channels can be

RBS 6601

Abstract: intel 80188 Lucent SLC 96 block diagram rbs 6601 SESCO
Contextual Info: Preliminary Data Sheet June 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7230A Primary Access Framer/Controller Features • Framing formats — DS1 extended superframe ESF — DS1 superframe (SF): D4; SLd -96; T 1DM DDS; T 1DM DDS with FDL access