DB15 DWG Search Results

Contextual Info: REVISIONS REV SCALE 1.500 DB15 Female DATE APPROVED A INITIAL RELEASE PER ECO #12-15011 04/09/12 S SHAW B FIXED CONNECTOR PER ECO #12-15099 05/23/12 S SHAW +2.000 36.000 -0.000 IPC67 Rated, Sealed D-Sub Connector Width: 1.67" IPC67 Rated, Sealed D-Sub Connector

Contextual Info: REVISIONS REV SCALE 1.500 DESCRIPTION DATE APPROVED A INITIAL RELEASE PER ECO #12-15011 04/09/12 S SHAW B FIXED CONNECTOR PER ECO #12-15099 05/23/12 S SHAW DB15 Female +2.000 36.000 -0.000 IPC67 Rated, Sealed D-Sub Connector Width: 1.67" 24 AWG Shielded Wire with 4 Conductors

DB15 DWG

Contextual Info: LTC1668 16-Bit, 50Msps DAC U FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC 1668 is a 16-bit, 50Msps differential current output DAC implemented on a high performance BiCMOS process with laser trimmed, thin-film resistors. The combination of a novel current-steering architecture and a

BUS-65600

Abstract: 5962-88585-01XC 63125 mil bus RTU DATA SHEET BUS-65601 BUS-63125 1553 bus controller BUS-65515
Contextual Info: 001 ILC DATA DEVICE CORPORATION- BUS-656008 MIL-STD-1553 BUS CONTROLLER REMOTE TERMINAL AND BUS MONITOR FEATURES COMPLETE BC, RTU, OR M T OPERATION SMALL 1.9" x 2.1" HYBRID PACKAGE BUS-65600 is available as MIL-DWG DESC 5962-88585-01XC. DESCRIPTION The BUS-65600 is a dual redundant

Contextual Info: 4 PART NO. 3 2 1 610282 REVISIONS LTR A B C D D DESCRIPTION INITIAL RELEASE SEE DO 4731 SEE DO 4745 SEE DO 5247 SEE DO 5418 C.P. C.P. C.P. C.P. DATE APPROVED 01-08-02 A.J. 01-23-02 A.J. 08-12-03 A.J. 03-08-04 A.J. D 1.85±.08 [47.0±2.0] ULTRA 320 Terminator

Contextual Info: 8 7 6 4 5 THE INFORMATION CONTAINED IN THIS DRAWING IS THE SOLE PROPERTY OF L-COM, INC. ANY REPRODUCTION IN PART OR WHOLE WITHOUT THE WRITTEN PERMISSION OF L-COM, INC. IS PROHIBITED. D 2 1 REVISIONS REV .63 PIN 1 3 DESCRIPTION DATE APPROVED A RELEASED FOR PRODUCTION

hd66791

Abstract: DB15 dwg lcd pm 128 bl DB10
Contextual Info: 3 I lnfoi~natlon therewith c 5 4 ï Varltronlx c ISSUE -0,054 AM ENDM ENT U PD AT E /K1 DATE TABLE 05,05,10 - 2 6 , 6 4 + 0,15-25,04 A - - 0.1 _ 0,0 A — 2 4 ,7 4 + 0.2 — - V .A = 2 1 .7 4 - (DDT -(A. A = 2 0 , 7 3 6 ) - CU ST DME R SI ZE F DR REFERENCE

74ALVCH244

Abstract: DB16 connector
Contextual Info: IDT79EB351 Evaluation Board Manual January 2002 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 330-1748 Printed in U.S.A. 2001 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

74ALVCH244

Abstract: j2233 RC3235 MSC501 71V416S15
Contextual Info: 79EB351 Evaluation Board Manual June 2003 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 800 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. 2005 Integrated Device Technology, Inc. DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: ISL51002 Data Sheet April 24, 2007 10-Bit Video Analog Front End AFE with Measurement and Auto-Adjust Features The ISL51002 3-channel, 10-bit Analog Front End (AFE) contains all the functionality needed to digitize analog YPbPr video from HDTV tuners, settop boxes, SD and HD DVDs,

Contextual Info: Integrated Device Technology, Inc. CMOS DUAL SyncFlFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, DUAL 4 ,0 9 6 x 1 8 FEATURES: • • • • • • • • • • • • The IDT72805 is equivalent to two 72205LB 256 x 18 FIFOs

Contextual Info: LTC2208 16-Bit, 130Msps ADC FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ U ■ DESCRIPTIO Sample Rate: 130Msps 78dBFS Noise Floor 100dB SFDR SFDR >83dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H

Contextual Info: LTC2209 16-Bit, 160Msps ADC FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Sample Rate: 160Msps 77.3dBFS Noise Floor 100dB SFDR SFDR >84dB at 250MHz 1.5VP-P Input Range PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H

DB9 pin pull

Abstract: LTC1461 LTC2208 LTC2208-14
Contextual Info: LTC2208 16-Bit, 130Msps ADC FEATURES DESCRIPTION n The LTC 2208 is a 130Msps, sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized with the PGA

LTC1591-1

Contextual Info: LTC1591/LTC1597 14-Bit and 16-Bit Parallel Low Glitch Multiplying DACs with 4-Quadrant Resistors DESCRIPTIO FEATURES • ■ ■ ■ ■ ■ ■ True 16-Bit Performance Over Industrial Temperature Range DNL and INL: 1LSB Max On-Chip 4-Quadrant Resistors Allow Precise 0V to

LT1597

Abstract: LTC203AC specifications of 2N 1597 DATASHEET OF 2N 1597 LT1468 LTC1597-1 R2523 MARKING 1CG LT1001 LTC1591-1
Contextual Info: LTC1591/LTC1597 14-Bit and 16-Bit Parallel Low Glitch Multiplying DACs with 4-Quadrant Resistors DESCRIPTIO U FEATURES • ■ ■ ■ ■ ■ ■ ■ True 16-Bit Performance Over Industrial Temperature Range DNL and INL: 1LSB Max On-Chip 4-Quadrant Resistors Allow Precise 0V to

Contextual Info: LCD Module Technical Specification First Edition ÌatSfFfiE Apr.4, 2008 Final Revision JMSBftfT Apr. 12, 2012 TypeNo. T-55149G D030J-M LW-AJ N C ustom er : STANDARD / K Custom er's Product No KYOCERA Display Corporation Approved: Toshiyuki Okamoto QU A L I TY A S S U R A N C E D I V I S I O N

Contextual Info: ISL98003 September 25, 2008 Data Sheet 8-Bit Video Analog Front End AFE with Measurement and Auto-Adjust Features FN6760.0 Features • The ISL98003 3-channel, 8-bit Analog Front End (AFE) contains all the functionality needed to digitize analog YPbPr

VRAM

Abstract: TMS55161 bd20 BD37 vram dual port 555 design guide LA31-LA
Contextual Info: TMS320C80 Frame Buffer Application Report 1997 Digital Signal Processing Solutions Printed in U.S.A., February 1997 SPRA156 TMS320C80 Frame Buffer Application Report SPRA156 February 1997 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

APC UPS es 750 CIRCUIT DIAGRAM

Abstract: HAF27 HAF24 MFS-208 APC UPS CIRCUIT DIAGRAM
Contextual Info: VIEWTEQ WWW.VIEWTEQ.COM 2014 PRODUCTS CATALOG Web Catalog 12 Welcome to ViewTEQ, where the most innovative and high performance headend which has, products, test equipment and drop material are produced by our cumulatively, more than 200 years experience in the CATV, satellite and

LT6200-5

Abstract: LT6200-10
Contextual Info: LTC2368-18 18-Bit, 1Msps, PseudoDifferential Unipolar SAR ADC with 97dB SNR FEATURES n n n n n n n n n n n n n n n DESCRIPTION The LTC 2368-18 is a low noise, low power, high speed 18-bit successive approximation register SAR ADC. Operating from a 2.5V supply, the LTC2368-18 has a 0V

LTC2367-16

Contextual Info: LTC2367-16 16-Bit, 500ksps, PseudoDifferential Unipolar SAR ADC with 94.7dB SNR FEATURES DESCRIPTION 500ksps Throughput Rate ±0.75LSB INL Max n Guaranteed 16-Bit No Missing Codes n Low Power: 6.8mW at 500ksps, 6.8µW at 500sps n 94.7dB SNR (Typ) at f = 2kHz

LT6200-5

Abstract: LT6200-10
Contextual Info: LTC2369-18 18-Bit, 1.6Msps, PseudoDifferential Unipolar SAR ADC with 96.5dB SNR FEATURES DESCRIPTION n The LTC 2369-18 is a low noise, low power, high speed 18-bit successive approximation register SAR ADC. Operating from a 2.5V supply, the LTC2369-18 has a 0V

LT6200-5

Abstract: LT6200-10
Contextual Info: LTC2383-16 16-Bit, 1Msps, Low Power SAR ADC with Serial Interface FEATURES n n n n n n n n n n n n n n DESCRIPTION The LTC 2383-16 is a low noise, low power, high speed 16-bit successive approximation register SAR ADC. Operating from a 2.5V supply, the LTC2383-16 has a