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    DATA TRANSMISSION THROUGH POWER LINES Search Results

    DATA TRANSMISSION THROUGH POWER LINES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    NFMJMPC226R0G3D
    Murata Manufacturing Co Ltd Data Line Filter, PDF
    NFM15PC755R0G3D
    Murata Manufacturing Co Ltd Feed Through Capacitor, PDF
    NFM15PC435R0G3D
    Murata Manufacturing Co Ltd Feed Through Capacitor, PDF
    NFM15PC915R0G3D
    Murata Manufacturing Co Ltd Feed Through Capacitor, PDF
    MGN1D120603MC-R7
    Murata Manufacturing Co Ltd DC-DC 1W SM 12-6/-3V GAN PDF

    DATA TRANSMISSION THROUGH POWER LINES Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    4pr24

    Abstract: 1583a Low Voltage Differential Signaling Problems with LVDS SLLA073 784D PS2521G SN65LVDS1DBVR SN65LVDT2DBVR
    Contextual Info: Application Report SLLA073 - March 2000 Solving Noise Problems Using Low Voltage Differential Signaling James Stokes AAP Data Transmission ABSTRACT This report analyzes the use of low-voltage differential signaling LVDS to solve noise problems that affect the transmission of low-power data. This is accomplished through a


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    SLLA073 SN65LVDT2DBVR 4pr24 1583a Low Voltage Differential Signaling Problems with LVDS SLLA073 784D PS2521G SN65LVDS1DBVR PDF

    180 degree 3dB coupler

    Abstract: AN3027 JB 71 JB 71 datasheet phase shift keying transmission line theory
    Contextual Info: What Actually Creates The 90 Degree Coupler Phase Shift? M/A-COM Application Note #3027 Application Note AN3027 V1 In a coupler made up of parallel coupled lines there is a phase relationship between the through port and the coupled port. The electrical phase of the coupled port is +90 degrees when the through port is referenced as 0 degrees. This +90 degree phase occurs at all frequencies for which the coupler has a good match. Parallel line couplers which have this characteristic are designed symmetrically with an odd number of sections.


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    AN3027 180 degree 3dB coupler AN3027 JB 71 JB 71 datasheet phase shift keying transmission line theory PDF

    HDMI TO component cable PINOUT

    Abstract: hdmi over cat5 LMH7220 DS15BR400 DS15BR401 DS25BR100 DS25BR110 DS25BR120 DS90LV004 DS90LV804
    Contextual Info: 8210 Signal_Path_110 6/18/07 1:31 PM Page 1 SIGNAL PATH designer Tips, tricks, and techniques from the analog signal-path experts No. 110 Feature Article.1-7 Extending the Signal Path Over Data Transmission Lines LVDS Buffers .2 — By Lee Sledjeski, Applications Engineer


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    PDF

    CY7B933

    Abstract: CY7C924DX CYP15G0201DXB 40080
    Contextual Info: PRELIMINARY CYP15G0201DXB Dual HOTLink II Transceiver Features — Source matched for 50Ω transmission lines — No external bias resistors required • 2nd generation HOTLink technology • Fibre Channel and Gigabit Ethernet compliant 8B/10B-coded or 10-bit unencoded


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    CYP15G0201DXB 8B/10B-coded 10-bit SMPTE-292M, SMPTE-259M 16-bit CYP15G0201DXB CY7B933 CY7C924DX 40080 PDF

    CY15G0401

    Contextual Info: CYP15G0201DXB PRELIMINARY Dual-channel HOTLink II Transceiver Features — Source matched for 50Ω transmission lines — Single- or Multi-byte framer for byte alignment — Low-latency option Skew alignment support for multiple bytes of offset Synchronous LVTTL parallel input interface


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    CYP15G0201DXB 8B/10B-coded 10-bit SMPTE-292M-, SMPTE-259M-compliant 16-bit 0C80C069 1C80C069 CY15G0401 PDF

    CY7B933

    Abstract: CYP15G0401DXB
    Contextual Info: PRELIMINARY CYP15G0401DXB Quad HOTLink II Transceiver Features • Dual differential PECL-compatible serial outputs per channel — Source matched for 50Ω transmission lines • 2nd generation HOTLink technology • Fibre Channel and Gigabit Ethernet compliant


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    CYP15G0401DXB 8B/10B-coded 10-bit SMPTE-292M, SMPTE-259M CY7B933 CYP15G0401DXB PDF

    transistor mark code t1

    Abstract: AN573 LTE repeater ICS Interference HDB3 to Unipolar Binary Code HC-5560 PCM30 TRANSISTOR SUBSTITUTION HDB3 coaxial link decoding of return to zero format HDB3 can use where
    Contextual Info: The HC-5560 Digital Line Transcoder TM Application Note January 1997 AN573.l Introduction Unipolar Coding The Intersil HC-5560 digital line transcoder provides mode selectable, pseudo ternary line coding and decoding schemes for North American and European transmission lines. Coding


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    HC-5560 AN573 544MHz) 152MHz) 3212MHof transistor mark code t1 LTE repeater ICS Interference HDB3 to Unipolar Binary Code PCM30 TRANSISTOR SUBSTITUTION HDB3 coaxial link decoding of return to zero format HDB3 can use where PDF

    CYP15G0201DXB

    Abstract: CYV15G0201DXB CYW15G0201DXB
    Contextual Info: CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB Dual-channel HOTLink II Transceiver Features — Internal DC-restoration • Dual differential PECL-compatible serial outputs per channel — Source matched for 50Ω transmission lines • Second-generation HOTLink technology


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    CYP15G0201DXB CYV15G0201DXB CYW15G0201DXB IEEE802 16-bit 200-PPM 1500-PPM CYW15G0201DXB CYP15G0201DXB CYV15G0201DXB PDF

    4-bit even parity checker circuit diagram

    Abstract: CY7B9294 D28.6 Package CY7B933 CY7C924DX
    Contextual Info: PRELIMINARY CY7B9294V Quad HOTLink-II Transceiver Features — Source matched for 50Ω transmission lines • 2nd generation HOTLink technology • Fibre Channel and Gigabit Ethernet compliant 8B/10Bcoded or 10-bit unencoded • 8-bit encoded data transport


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    CY7B9294V 8B/10Bcoded 10-bit CY7B9494V 4-bit even parity checker circuit diagram CY7B9294 D28.6 Package CY7B933 CY7C924DX PDF

    Contextual Info: Freescale Semiconductor Technical Data Document Number: MC33199 Rev. 4.0, 10/2006 33199 The MC33199 is a serial interface circuit used in diagnostic applications. It is the interface between the microcontroller and the special K and L lines of the ISO diagnostic port. The MC33199 has


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    MC33199 MC33199 ISO9141Â 200kBaud. ISO-9141 J-1850 PDF

    ABT16244

    Abstract: ABT244 AN246 SH00122
    Contextual Info: INTEGRATED CIRCUITS AN246 Transmission lines and terminations with Philips Advanced Logic families Author: Mike Magdaluyo Philips Semiconductors February 1998 Philips Semiconductors Application Note Transmission lines and terminations with Philips Logic families


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    AN246 ABT16244 ABT244 AN246 SH00122 PDF

    A 331G

    Abstract: 221/331g PRN112 MDP1405-221/331G
    Contextual Info: PRN 102/112 CALIFORNIA MICRO DEVICES CALIFORNIA MICRO DEVICES DUAL THEVENIN TERMINATION NETWORK Features • Stable resistor network • 18 terminating lines/package • Saves board space and reduces assembly cost Applications • SCSI termination • Thévenin termination


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    plc modem using fsk

    Abstract: ARM 7TDMI MICROPROCESSOR NAD 3015 diode 1334 AMIS-30585 ARM 7TDMI 32 BIT MICROPROCESSOR acia marking 1334 onsemi marking R12 PLC coupling transformer
    Contextual Info: AMIS-30585 S-FSK PLC Modem General Description The AMIS−30585 is a half duplex S−FSK modem and is dedicated for the data transmission on low− or medium−voltage power lines. The device offers complete handling of the protocol layers from the physical up to the MAC. AMIS−30585 complies with the EN 50065


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    AMIS-30585 AMIS-30585 AMIS-30585/D plc modem using fsk ARM 7TDMI MICROPROCESSOR NAD 3015 diode 1334 ARM 7TDMI 32 BIT MICROPROCESSOR acia marking 1334 onsemi marking R12 PLC coupling transformer PDF

    AN1849

    Abstract: APP1849 LS12 LS22 MAX2320
    Contextual Info: Maxim > App Notes > Wireless and RF Keywords: lna, rf, rfic, amplifier, stability, power gain, transmission lines, rfics, theory, smith chart, rf ics, radio frequency, amplifiers, low noise amplifier, amps Jan 09, 2003 APPLICATION NOTE 1849 Low-Noise Amplifier Stability Concept to Practical Considerations,


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    MAX2320: com/an1849 AN1849, APP1849, Appnote1849, AN1849 APP1849 LS12 LS22 MAX2320 PDF

    linky

    Contextual Info: NCN49597 Product Preview Power Line Carrier Modem ON Semiconductor’s NCN49597 is an IEC 61334−5−1 compliant power line carrier modem using spread−FSK S−FSK modulation for robust low data rate communication over power lines. NCN49597 is built around an ARM processor core, and includes the MAC layer.


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    NCN49597 NCN49597 NCN49597/D linky PDF

    Contextual Info: I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION NO.EA-079-0208 RV5C386A OUTLINE The RV5C386A is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is


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    RV5C386A EA-079-0208 RV5C386A PDF

    12-2052f

    Abstract: Twisted Pair split termination sat receiver schematics surge APPLICATION note transmission lines Twisted Pair 12-2058F 12-2040F
    Contextual Info: Application Note October 1998 Lightning Protection for Data Lines Contents Page Introduction . 1 The BPNGA/BPNPA Line Drivers and the BRF1A Line Receiver . 2


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    AP99-006HSI AP98-072HSI) 12-2052f Twisted Pair split termination sat receiver schematics surge APPLICATION note transmission lines Twisted Pair 12-2058F 12-2040F PDF

    MO-187-BA

    Abstract: RM-10 stub
    Contextual Info: Full-Duplex, Low Power, Slew Rate Limited, EIA RS-485 Transceivers ADM488A/ADM489A ADM488A A B Z DI GENERAL DESCRIPTION The ADM488A and ADM489A are low power, differential line transceivers suitable for communication on multipoint bus transmission lines. They are intended for balanced data


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    RS-485 ADM488A/ADM489A ADM488A ADM488A ADM489A RS-422 ADM488A/ADM489A 10-Lead MO-187-BA RM-10 stub PDF

    DH10

    Abstract: RV5C386A RV5C386A-E2 WH10
    Contextual Info: 12345 Preliminary 9.Jun.99 I2C-Bus Real-Time Clock ICs with Voltage Monitoring Function RV5C386A 1. OUTLINE The RV5C386A is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit


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    RV5C386A RV5C386A X1X1X101) DH10 RV5C386A-E2 WH10 PDF

    X10 schematic

    Abstract: URC-3000 SEP8703-1 X10 home auto RR501 zilog z86E08 URC3 2N3906 P20-P23 Z86E08
    Contextual Info: APPLICATION NOTE X-10 COMPATIBLE INFRARED REMOTE CONTROL 1 AUTOMATE YOUR HOUSE WITH AN INFRARED CONTROL SYSTEM UTILIZING STANDARD 110 VOLT POWER LINES AND A ZILOG Z86L06 MICROCONTROLLER. HOUSED IN THE URC-3000 COMMAND CENTER, THE Z86L06 CAN CONTROL UP TO 16 DEVICES.


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    Z86L06 URC-3000 AP96LVO0200 X10 schematic SEP8703-1 X10 home auto RR501 zilog z86E08 URC3 2N3906 P20-P23 Z86E08 PDF

    cmos Quartz 32768hz

    Abstract: diagram free 76810 ic R2023K R2023K-E2 R2023T
    Contextual Info: 12345 2 wire serial interface Real-Time Clock IC R2023K/T Preliminary NO. EA-124-0506 OUTLINE The R2023K/T is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL, SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to


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    R2023K/T EA-124-0506 R2023K/T X1X1X101) cmos Quartz 32768hz diagram free 76810 ic R2023K R2023K-E2 R2023T PDF

    Contextual Info: R2023K/T 2-wire Serial Interface Real Time Clock IC NO.EA-124-0510 OUTLINE The R2023K/T is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL, SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to


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    R2023K/T EA-124-0510 R2023K/T X1X1X101) PDF

    Contextual Info: R2023K/T 2-wire Serial Interface Real Time Clock IC NO.EA-124-061101 OUTLINE The R2023K/T is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL, SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to


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    R2023K/T EA-124-061101 R2023K/T X1X1X101) PDF

    R2025D

    Contextual Info: 12345 ’04.06.10 I2C-Bus Real-Time Clock Module R2025S/D OUTLINE The R2025S/D is a real-time clock module, built in CMOS real-time clock IC and crystal oscillator, connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar


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    R2025S/D R2025S/D 15sec. R2025D PDF