DATA ENCRYPTION STANDARD DES Search Results
DATA ENCRYPTION STANDARD DES Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| 27S07ADM/B | Rochester Electronics LLC | 27S07A - Standard SRAM, 16X4 |
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| 27LS07DM/B | Rochester Electronics LLC | 27LS07 - Standard SRAM, 16X4 |
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| 54HC152J/B | Rochester Electronics LLC | 54HC152 - 8 to 1 Line Data Selectors/Multiplexers |
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| HM4-6504S-8/B | Rochester Electronics LLC | HM4-6504 - Standard SRAM, 4KX1, 220ns, CMOS |
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| 54LS298/BEA | Rochester Electronics LLC | 54LS298 - DATA SEL/MULTIPLEXER, QUAD 2-INPUT, WITH STORAGE - Dual marked (M38510/30909BEA) |
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DATA ENCRYPTION STANDARD DES Datasheets (1)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| Data Encryption Standard (DES) | Atmel | 32-bit Embedded Core Peripheral | Original | 74.05KB | 12 |
DATA ENCRYPTION STANDARD DES Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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6150ASContextual Info: Features • Compatible with an Embedded 32-bit Microcontroller • Supports Single Data Encryption Standard DES and Triple Data Encryption Algorithm (TDEA or TDES) Compliant with FIPS Publication 46-3, Data Encryption Standard (DES) 64-bit Cryptographic Key |
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32-bit64-bit6150as04-mar-05 | |
verilog code for des
Abstract: verilog code for implementation of des inverse quick transformation 0123456789ABCDEF A28E91724C4BBA31
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verilog code for desverilog code for implementation of desinverse quick transformation0123456789abcdef+1 | |
verilog code for implementation of des
Abstract: Data Encryption Standard DES
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verilog code for implementation of desdata encryption standard des | |
667 ecb
Abstract: verilog code for implementation of des verilog code for des tsmc sram
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667 ecbverilog code for implementation of desverilog code for destsmc sram | |
la 4451
Abstract: verilog code for implementation of des cycloneIII ep2c20 EP2C20-6
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0x0123456789abcdef0x4e6f7720697320740x68652074696d65200x666f7220616c6c20+8 | |
200B
Abstract: AN583 PIC17C42
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pic17c42an58364-bit56-bit+1 | |
1364D-CASIC-11Contextual Info: Features Bus-compatible with the ARM7TDMI Core 16-clock Cycle Encryption/Decryption Process On Request: 16, 8, 4 Clock Cycle Encryption/Decryption Process for Single DES Two-key or Three-key Algorithms Optimized for Triple Data Encryption Capability Single or Triple Data Encryption Standard |
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16-clock64-bit1364d1364d-casic-11 | |
verilog code for implementation of des
Abstract: 3S1200E-4 verilog code for des
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0x0123456789abcdef0x4e6f7720697320740x68652074696d65200x666f7220616c6c20+6 | |
verilog code for implementation of des
Abstract: verilog code for des tsmc sram des verilog RTL 604
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0x0123456789abcdef0x4e6f7720697320740x68652074696d65200x666f7220616c6c20+8 | |
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Contextual Info: JULY 1991 TM CRL CA20C03A DES ENCRYPTION PROCESSOR • High speed DES Encryption Processor is pin and function compatible with industry standard WD20C03A • Data transfer rates up to 4.0 Mbytes per second • Encrypts and decrypts using Data Encryption Standard DES adopted by the U.S. Department |
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ca20c03awd20c03a64-bit | |
CA20C03AContextual Info: CA20C03A DES ENCRYPTION PROCESSOR • The CA20C03A is an improved version of the DES encryption processor designed by Tundra Semiconductor Corporation. • Data transfer rates up to 3.85 Mbytes per second • Encrypt and decrypt using Data Encryption Standard DES adopted by the U.S. Department |
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ca20c03a64-bit56bit68652074696d6520+4 | |
XC6200
Abstract: XC6216 XC6264 XACT6000 xilinx XC6216
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xc6216xc6200xc6200dsxc6264+2 | |
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Contextual Info: Am9518 /AmZ8068 Data Ciphering Processor DISTINCTIVE CHARACTERISTICS Encrypts and decrypts data Three separate key registers on-chip Implements National Bureau of Standards standard data encryption algorithm. Separate registers for encryption key, decryption key |
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am9518/amz8068amz8068cd005111+3 | |
63B53Contextual Info: cmm CA20C03A DES ENCRYPTION PROCESSOR High speed DES Encryption Processor is pin and function compatible with industry standard WD20C03A The Newbridge Microsystems CA20C03A DES Encryption Processor is designed to encrypt and decrypt 64-bit blocks of data using the algorithm specified in the Federal |
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ca20c03awd20c03a64-bit56-bit+3 | |
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CBC 640
Abstract: Triple DES ccs compiler tutorial DES Encryption transistor substitution chart C6000 C6201 TMS320C6000 TMS320C6201 TMS320C6211
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spra702tms320c6000c6000tms320c6000tm+9 | |
verilog code for 128 bit AES encryption
Abstract: vhdl code for cbc verilog code for 32 bit AES encryption TSMC 90nm vhdl code for aes decryption SP800-38A vhdl code for AES algorithm FIPS-197
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fips-197256-bits128ectorssp800-38a+6 | |
cbc 327
Abstract: verilog code for 128 bit AES encryption FIPS-197 SP800-38A EP3SE50 verilog code for 32 bit AES encryption verilog code for AES algorithm
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fips-197128-bit192-bit256-bit+7 | |
AMBA AHB DMA
Abstract: hardware AES controller AES with DMA AES chips QL902M 0004h 32 bit cpu verilog testbench 9400H 100414FC Eclipse II Family
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128-bit64-bitamba ahb dmahardware aes controller+8 | |
MSC8101
Abstract: SC140 code warrior makefile
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an2268/dsc140msc8101code warrior makefile | |
verilog code for 128 bit AES encryption
Abstract: 3s250e SP800-38A FIPS-197 nist SP800-38A
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fips-197256-bitssp800-38averilog code for 128 bit aes encryption+2 | |
SP800-38A
Abstract: FIPS-197 verilog code for 128 bit AES encryption verilog code for 32 bit AES encryption verilog code for AES algorithm verilog code for aes encryption
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fips-197256-bits128acesp800-38a+4 | |
200B
Abstract: AN583 DK-2750 PIC17C42 RG41
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an583pic17c42d-81739200b+2 | |
200B
Abstract: AN583 DK-2750 PIC17C42 RG41
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an583pic17c42200bdk-2750+1 | |
200B
Abstract: AN583 PIC17C42
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an583pic17c42ds00583a-page200b | |