DATA ENCRYPTION STANDARD DES Search Results

DATA ENCRYPTION STANDARD DES Result Highlights (5)

Part	Manufacturer	Description	Download
27S07ADM/B	Rochester Electronics LLC	27S07A - Standard SRAM, 16X4	PDF
27LS07DM/B	Rochester Electronics LLC	27LS07 - Standard SRAM, 16X4	PDF
54HC152J/B	Rochester Electronics LLC	54HC152 - 8 to 1 Line Data Selectors/Multiplexers	PDF
HM4-6504S-8/B	Rochester Electronics LLC	HM4-6504 - Standard SRAM, 4KX1, 220ns, CMOS	PDF
54LS298/BEA	Rochester Electronics LLC	54LS298 - DATA SEL/MULTIPLEXER, QUAD 2-INPUT, WITH STORAGE - Dual marked (M38510/30909BEA)	PDF

DATA ENCRYPTION STANDARD DES Datasheets (1)

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Atmel

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
Data Encryption Standard (DES)		Atmel	32-bit Embedded Core Peripheral	Original	PDF	74.05KB	12

DATA ENCRYPTION STANDARD DES Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
verilog code for des Abstract: verilog code for implementation of des inverse quick transformation 0123456789ABCDEF A28E91724C4BBA31 Contextual Info: FIPS 46-3 Standard Compliant Encryption/Decryption performed in 48 cycles ECB mode DES3 Up to 168 bits of security Triple Data Encryption Standard Core Verilog IP Core The DES3 core implements the Triple Data Encryption Standard (DES3) documented in the U.S. Government publication FIPS 46-3.	Original	verilog code for des verilog code for implementation of des inverse quick transformation 0123456789abcdef +1a28e91724c4bba31	PDF
verilog code for implementation of des Abstract: Data Encryption Standard DES Contextual Info: FIPS 46-3 Standard Compliant Encryption/Decryption performed in 48 cycles ECB mode DES3 Up to 168 bits of security Triple Data Encryption Standard Megafunction Verilog IP Megafunction The DES3 megafunction implements the Triple Data Encryption Standard (DES3) documented in the U.S. Government publication FIPS 46-3.	Original	verilog code for implementation of des data encryption standard des	PDF
667 ecb Abstract: verilog code for implementation of des verilog code for des tsmc sram Contextual Info: FIPS 46-3 Standard Compliant Encryption/Decryption performed in 48 cycles ECB mode DES3 Up to 168 bits of security Triple Data Encryption Standard Core Verilog IP Core The DES3 core implements the Triple Data Encryption Standard (DES3) documented in the U.S. Government publication FIPS 46-3.	Original	667 ecb verilog code for implementation of des verilog code for des tsmc sram	PDF
la 4451 Abstract: verilog code for implementation of des cycloneIII ep2c20 EP2C20-6 Contextual Info: FIPS 46-3 Standard Compliant DES Data Encryption Standard Megafunction Encryption/Decryption performed in 16 cycles ECB mode 56 bits of security For use in FPGA or ASIC designs Verilog IP Megafunction Non Pipelined version Small gate count The DES megafunction implements the Data Encryption Standard (DES) documented in	Original	0x0123456789abcdef 0x4e6f772069732074 0x68652074696d6520 0x666f7220616c6c20 +80x3fa40e8a984d4815 0x6a271787ab8883f9 0x893d51ec4b563b53 la 4451 verilog code for implementation of des cycloneiii ep2c20 ep2c20-6	PDF
1364D-CASIC-11 Contextual Info: Features Bus-compatible with the ARM7TDMI Core 16-clock Cycle Encryption/Decryption Process On Request: 16, 8, 4 Clock Cycle Encryption/Decryption Process for Single DES Two-key or Three-key Algorithms Optimized for Triple Data Encryption Capability Single or Triple Data Encryption Standard	Original	16-clock 64-bit 1364d 1364d-casic-11	PDF
verilog code for implementation of des Abstract: 3S1200E-4 verilog code for des Contextual Info: FIPS 46-3 Standard Compliant DES Data Encryption Standard Core Encryption/Decryption performed in 16 cycles ECB mode 56 bits of security For use in FPGA or ASIC designs Verilog IP Core Non Pipelined version Small gate count The DES core implements the Data Encryption Standard (DES) documented in the U.S.	Original	0x0123456789abcdef 0x4e6f772069732074 0x68652074696d6520 0x666f7220616c6c20 +60x3fa40e8a984d4815 0x6a271787ab8883f9 0x893d51ec4b563b53 verilog code for implementation of des 3s1200e-4 verilog code for des	PDF
verilog code for implementation of des Abstract: verilog code for des tsmc sram des verilog RTL 604 Contextual Info: FIPS 46-3 Standard Compliant DES Data Encryption Standard Core Encryption/Decryption performed in 16 cycles ECB mode 56 bits of security For use in FPGA or ASIC designs Verilog IP Core Non Pipelined version Small gate count The DES core implements the Data Encryption Standard (DES) documented in the U.S.	Original	0x0123456789abcdef 0x4e6f772069732074 0x68652074696d6520 0x666f7220616c6c20 +80x3fa40e8a984d4815 0x6a271787ab8883f9 0x893d51ec4b563b53 verilog code for implementation of des verilog code for des tsmc sram des verilog rtl 604	PDF
Contextual Info: JULY 1991 TM CRL CA20C03A DES ENCRYPTION PROCESSOR • High speed DES Encryption Processor is pin and function compatible with industry standard WD20C03A • Data transfer rates up to 4.0 Mbytes per second • Encrypts and decrypts using Data Encryption Standard DES adopted by the U.S. Department	OCR Scan	ca20c03a wd20c03a 64-bit	PDF
CA20C03A Contextual Info: CA20C03A DES ENCRYPTION PROCESSOR • The CA20C03A is an improved version of the DES encryption processor designed by Tundra Semiconductor Corporation. • Data transfer rates up to 3.85 Mbytes per second • Encrypt and decrypt using Data Encryption Standard DES adopted by the U.S. Department	Original	ca20c03a 64-bit 56bit 68652074696d6520 +4666f7220616c6c20 0123456789abcdef 1234567890abcdef 4e6f772069732074	PDF
XC6200 Abstract: XC6216 XC6264 XACT6000 xilinx XC6216 Contextual Info: APPLICATION NOTE R DES Encryption and Decryption on the XC6216 XAPP 106 February 2, 1998 Version 1.0 Application Note by Ann Duncan Summary This note describes the design and implementation of DES (Data Encryption Standard) encryption/decryption using the XC6216	Original	xc6216 xc6200 xc6200ds xc6264 +2xact6000 xilinx xc6216	PDF
Contextual Info: Am9518 /AmZ8068 Data Ciphering Processor DISTINCTIVE CHARACTERISTICS Encrypts and decrypts data Three separate key registers on-chip Implements National Bureau of Standards standard data encryption algorithm. Separate registers for encryption key, decryption key	OCR Scan	am9518 /amz8068 amz8068 cd005111 +3af002220 af002230 00618b	PDF
63B53 Contextual Info: cmm CA20C03A DES ENCRYPTION PROCESSOR High speed DES Encryption Processor is pin and function compatible with industry standard WD20C03A The Newbridge Microsystems CA20C03A DES Encryption Processor is designed to encrypt and decrypt 64-bit blocks of data using the algorithm specified in the Federal	OCR Scan	ca20c03a wd20c03a 64-bit 56-bit +3decr0616c6c20 0123456789abcdef 63b53	PDF
verilog code for 128 bit AES encryption Abstract: vhdl code for cbc verilog code for 32 bit AES encryption TSMC 90nm vhdl code for aes decryption SP800-38A vhdl code for AES algorithm FIPS-197 Contextual Info: Conforms to the Advanced Encryption Standard AES standard (FIPS PUB 197) AES-C Single module efficiently integrates multiple AES functions AES Optimized Encrypt/Decrypt Core Run-time programmable for: The AES-C core implements hardware data encryption and decryption using Rijndael	Original	fips-197 256-bits 128ectors sp800-38a +6verilog code for 128 bit aes encryption vhdl code for cbc verilog code for 32 bit aes encryption tsmc 90nm vhdl code for aes decryption vhdl code for aes algorithm	PDF
cbc 327 Abstract: verilog code for 128 bit AES encryption FIPS-197 SP800-38A EP3SE50 verilog code for 32 bit AES encryption verilog code for AES algorithm Contextual Info: Conforms to the Advanced Encryption Standard AES standard (FIPS PUB 197) AES-C Single module efficiently integrates multiple AES functions AES Optimized Encrypt/Decrypt Megafunction Run-time programmable for: The AES-C megafunction implements hardware data encryption and decryption using	Original	fips-197 128-bit 192-bit 256-bit +732-bit sp800-38a cbc 327 verilog code for 128 bit aes encryption ep3se50 verilog code for 32 bit aes encryption verilog code for aes algorithm	PDF

verilog code for 128 bit AES encryption Abstract: 3s250e SP800-38A FIPS-197 nist SP800-38A Contextual Info: Conforms to the Advanced Encryption Standard AES standard (FIPS PUB 197) AES-C Single module efficiently integrates multiple AES functions AES Optimized Encrypt/Decrypt Core Run-time programmable for: The AES-C core implements hardware data encryption and decryption using Rijndael	Original	fips-197 256-bits sp800-38a verilog code for 128 bit aes encryption +23s250e nist sp800-38a	PDF
SP800-38A Abstract: FIPS-197 verilog code for 128 bit AES encryption verilog code for 32 bit AES encryption verilog code for AES algorithm verilog code for aes encryption Contextual Info: Conforms to the Advanced Encryption Standard AES standard (FIPS PUB 197) AES-C Single module efficiently integrates multiple AES functions AES Optimized Encrypt/Decrypt Core Run-time programmable for: The AES-C core implements hardware data encryption and decryption using Rijndael	Original	fips-197 256-bits 128ace sp800-38a +4verilog code for 128 bit aes encryption verilog code for 32 bit aes encryption verilog code for aes algorithm verilog code for aes encryption	PDF
200B Abstract: AN583 DK-2750 PIC17C42 RG41 Contextual Info: AN583 Implementation of the Data Encryption Standard Using PIC17C42 Authors: Al Lovrich Mark Palmer Microchip Technology Inc. INTRODUCTION In January 1977, The United States government adopted a product cipher developed by IBM as its official encryption standard [1]. This algorithm, called the	Original	an583 pic17c42 200b dk-2750 +1rg41	PDF
CA95C68 Abstract: CA95C18 CA95C09 AM9568 "data ciphering processors" Contextual Info: CA95C68/18/09 DES DATA CIPHERING PROCESSORS DCP • Encrypts/Decrypts data using National Bureau of Standards Data Encryption Standard (DES) • High speed, pin and function compatible version of industry standard AMD AM9568, AM9518 and VLSI VM009 • Supports four standard ciphering modes:	Original	ca95c68/18/09 am9568 am9518 vm009 +733mhz of8/18/09 am9568/18 ca95c68 ca95c18 ca95c09 data ciphering processors	PDF
Contextual Info: ~PI C A 9 5 C 6 8 I 1 8109 DES DATA CIPHERING PROCESSORS DCP • Encrypts/Decrypts data using National Bureau \| of Standards Data Encryption Standard (DES) • High speed, pin and function compatible version of industry standard AMD AM9568, AM9518 and VLSI VM009	OCR Scan	am9568 am9518 vm009 33mase +2ca95c68/18/09 am9568/18	PDF
AM9568 Contextual Info: Am9568 Data Ciphering Processor DCP DISTINCTIVE CHARACTERISTICS Encrypts and decrypts data • Implements National Bureau of Standards Data Encryp tion Standard (DES) algorithm Separate registers for encryption key, decryption key and master key improve system security and throughput	OCR Scan	am9568 am9566	PDF
95C68 Abstract: AM9518 AM9568 CA95C68 CA95C18 CA95C09 Tundra Semiconductor VM009 Z8000 DCP30 Contextual Info: A B T U N D R A C A 9 5 C 6 8 I18 I0 9 DES DATA CIPHERING PROCESSORS DCP Encrypts/Decrypts data using National Bureau \| of Standards Data Encryption Standard (DES) High speed, pin and function compatible version of industry standard AMD AM9568, AM9518 and VLSI VM009	OCR Scan	ca95c68118109 am9568 am9518 vm009 +1033mhz am9568/18 ca95c68/18/09 95c68 ca95c68 ca95c18 ca95c09 tundra semiconductor z8000 dcp30	PDF
SIS 661 Abstract: VM009 CA95C68 CA95C18 CA95C09 AM9518 AM9568 SDS S4 24V Z8000 nb11c Contextual Info: NEWBRIDGE MICROSYSTEMS NEWBRIDGE MICROSYSTEMS =,4E D JANUARY 1993 • bSflfilOl DQOSQSS 35S ■ NBMC CA95C68/18/09 DES DATA CIPHERING PROCESSORS (DCP • Encrypts/Decrypts data using National Bureau of Standards Data Encryption Standard (DES) • High speed, pin and function compatible version	OCR Scan	ca95c68/18/09 am9568 am9518 vm009 +7sis 661 ca95c68 ca95c18 ca95c09 sds s4 24v z8000 nb11c	PDF
0x00CC Abstract: DSP56800 DSP56824 des_sConfigure Contextual Info: Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Embedded SDK Software Development Kit Data Encryption Standard (DES) Library SDK110/D Rev. 2, 07/17/2002	Original	sdk110/d 0x00cc dsp56800 dsp56824 +1des_sconfigure	PDF
Contextual Info: APR 13 1993 # • NEWBRIDGE JANUARY 1993 C A 9 5 C 6 8 /1 8 /0 9 MICROSYSTEMS DES DATA CIPHERING PROCESSORS DCP Encrypts/Decrypts data using National Bureau of Standards Data Encryption Standard (DES) • High speed, pin and function com patible version	OCR Scan	am9568 am9518 vm009 ca95c68/18tq8i	PDF

DATA ENCRYPTION STANDARD DES Search Results

DATA ENCRYPTION STANDARD DES Result Highlights (5)

DATA ENCRYPTION STANDARD DES Datasheets (1)

DATA ENCRYPTION STANDARD DES Datasheets Context Search

verilog code for des

verilog code for implementation of des

667 ecb

la 4451

1364D-CASIC-11

verilog code for implementation of des

verilog code for implementation of des

CA20C03A

XC6200

63B53

verilog code for 128 bit AES encryption

cbc 327

verilog code for 128 bit AES encryption

SP800-38A

200B

CA95C68

AM9568

95C68

SIS 661

0x00CC