D9 - DG Search Results

Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to DGG PACKAGE TOP VIEW 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9

65LVDS95Q

Abstract: DS90CR215 SN65LVDS95 SN65LVDS95DGGRQ1 SN65LVDS96 SN65LVDS95Q1
Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to DGG PACKAGE TOP VIEW 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9

Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 DGG PACKAGE TOP VIEW D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9

AD7482

Abstract: AD7484 AD8021 AD8022 AD829 ADM809
Contextual Info: 3 MSPS, 14-Bit SAR ADC AD7484 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND CBIAS 2.5V REFERENCE DVDD VDRIVE DGND BUF REFSEL VIN REFOUT REFIN 14-BIT ALGORITHMIC SAR T/H AD7484 CONTROL LOGIC AND I/O REGISTERS D14 D13 D12 D11 D10 D9 D8 D7 02642-001 MODE1 MODE2

Contextual Info: 3 MSPS, 14-Bit SAR ADC AD7484 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND CBIAS 2.5V REFERENCE DVDD VDRIVE DGND BUF REFSEL VIN REFOUT REFIN 14-BIT ALGORITHMIC SAR T/H AD7484 CONTROL LOGIC AND I/O REGISTERS D14 D13 D12 D11 D10 D9 D8 D7 02642-001 MODE1 MODE2

Contextual Info: 3 MSPS, 14-Bit SAR ADC AD7484 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD AGND CBIAS 2.5V REFERENCE DVDD VDRIVE DGND BUF REFSEL VIN REFOUT REFIN 14-BIT ALGORITHMIC SAR T/H AD7484 CONTROL LOGIC AND I/O REGISTERS D14 D13 D12 D11 D10 D9 D8 D7 02642-001 MODE1 MODE2

AD7484

Abstract: AD8021 AD8022 AD829 ADM809 AD7482
Contextual Info: 3 MSPS, 14-Bit SAR ADC AD7484 FEATURES AVDD AGND CBIAS DVDD VDRIVE DGND 2.5V REFERENCE BUF REFSEL VIN REFOUT REFIN 14-BIT ALGORITHMIC SAR T/H AD7484 CONTROL LOGIC AND I/O REGISTERS D14 D13 D12 D11 D10 D9 D8 D7 02642-0-001 MODE1 MODE2 CLIP NAP STBY RESET CONVST

l 0315

Abstract: 7672RP-05 7672RP-10
Contextual Info: 1 SPACE ELECTRONICS INC. 12-BIT A/D CONVERTER SPACE PRODUCTS 7672RP AIN1 VDD AGND VSS D11 BUSY D10 CS D9 12 AIN2 VREF D8 RD SEi 7672RP CLK OUT D7 CLK IN D6 D0 D5 D1 D4 D2 DGND D3 VREF AIN1 AIN2 2 1 24 24 + - 12-BIT DAC + - SUCCESSIVE APPROXIMATION REGISTER

7805A

Contextual Info: 7805ALP 16-Bit Latchup Protected ADC VIN AGND1 REF CAP AGND2 D15 MSD D14 D13 D12 D11 D10 D9 D8 DGND 28 1 7805ALP 14 VS DECPLNG BUSY CS R/C STATUS D0(LSD) D1 D2 D3 D4 D5 15 D6 D7 Logic Diagram DESCRIPTION: • 16-bit organization • Latchup Protection Technology

7805A application

Abstract: 7805A transistor 7805A d28-08 MA 7805a 7805ALP 7805ALPRP ADS7805 adc 0808 internal circuit diagram d28 08
Contextual Info: 7805ALP 16-Bit Latchup Protected ADC VIN AGND1 REF 28 1 CAP AGND2 D15 MSD D14 D13 D12 D11 D10 D9 D8 DGND 7805ALP 14 VS DECPLNG BUSY CS R/C STATUS D0(LSD) D1 D2 D3 D4 D5 15 D6 D7 Logic Diagram DESCRIPTION: • 16-bit organization • Latchup Protection Technology

36W P9

Abstract: AD9215BRUZRL7-65 AD9215-105 R433W
Contextual Info: 10-Bit, 65/80/105 MSPS, 3 V A/D Converter AD9215 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS AVDD DRVDD VIN+ PIPELINE ADC CORE SHA VIN– REFT AD9215 REFB CORRECTION LOGIC 10 OR OUTPUT BUFFERS D9 MSB D0 VREF CLOCK DUTY CYCLE STABLIZER SENSE

ADT1-1WT AWT1-1T

Abstract: AD9215 AD9215-80 AD9215BCP-105 AD9215BCP-65 AD9215BCP-80 AD9215BRU-105 AD9215BRU-65 AD9215BRU-80 AD9215-65
Contextual Info: 10-Bit, 65/80/105 MSPS, 3 V A/D Converter AD9215 FEATURES APPLICATIONS AVDD DRVDD VIN+ PIPELINE ADC CORE SHA VIN– REFT AD9215 REFB CORRECTION LOGIC 10 OR OUTPUT BUFFERS D9 MSB D0 VREF CLOCK DUTY CYCLE STABLIZER SENSE Ultrasound equipment IF sampling in communications receivers

STR W 5453

Abstract: STR 5453 STR W 5453 A Potentiometer r30 e53 transistor WT6 45 AD9215 AD9215-80 AD9215BCP-105 AD9215BCP-65 AD9215BCP-80
Contextual Info: 10-Bit, 65/80/105 MSPS, 3 V A/D Converter AD9215 FEATURES APPLICATIONS AVDD DRVDD VIN+ PIPELINE ADC CORE SHA VIN– REFT AD9215 REFB CORRECTION LOGIC 10 OR OUTPUT BUFFERS D9 MSB D0 VREF CLOCK DUTY CYCLE STABLIZER SENSE Ultrasound equipment IF sampling in communications receivers

Contextual Info: 10-Bit, 65/80/105 MSPS, 3 V A/D Converter AD9215 FEATURES APPLICATIONS AVDD DRVDD VIN+ PIPELINE ADC CORE SHA VIN– REFT AD9215 REFB CORRECTION LOGIC 10 OR OUTPUT BUFFERS D9 MSB D0 VREF CLOCK DUTY CYCLE STABLIZER SENSE Ultrasound equipment IF sampling in communications receivers

Contextual Info: <:>F0<:>F/F 5GFB@BF=H9 D9?5J :NKXYVNW , N\s3^jiodijpn ^pmm`io 95C , N\s3h\fdib ^pmm`io 755C , Gso`i_`_ o`hk3 m\ib` pk oj 65: , Xdoc cdbcgt `no\]gdnc`_ m`gd\]dgdot , Tomjib m`ndno\i^` \]dgdot oj ncj^f - qd]m\odji F[UPLKQ 5UUQPLKXPTSW , S`agjr njg_`mdib q`mndji \q\dg\]g`

SMD MARKING CODE 01C sot23-6

Abstract: FN-01 STMicroelectronics smd marking code SOT23-6 32R Marking STMicroelectronics tqfp marking 1D SOT23-6 SOT23-6 MARKING DJ marking 2u sma
Contextual Info: IG N TSA1204 DUAL-CHANNEL, 12-BIT, 20MSPS, 120mW A/D CONVERTER S NOT FOR NEW DESIGN P 0.5Msps to 20Msps sampling frequency P Adaptive power consumption: 120mW @ D W TSA1204 AVCCB 7 29 D9 INQ 9 28 D10 AGND 10 27 D11 MSB INBQ 11 26 VCCBE R BLOCK DIAGRAM +2.5V/3.3V

CQ31

Abstract: TQFP48 TS4041 TS821 TSA1201 TSA1204 HP8644
Contextual Info: TSA1204 Dual channel 12-bit 20Msps 120mW A/D converter Features • 0.5 Msps to 20 Msps sampling frequency ■ Adaptive power consumption: 120 mW @ 20 Msps, 95 mW@10 Msps Multiplexed outputs ■ INIB 4 33 D5 AGND 5 32 D6 IPOL 6 31 D7 TSA1204 30 D8 29 D9 AGND 8

Contextual Info: TSA1204 Dual channel 12-bit 20Msps 120mW A/D converter Features • 0.5 Msps to 20 Msps sampling frequency ■ Adaptive power consumption: 120 mW @ 20 Msps, 95 mW@10 Msps Multiplexed outputs ■ INIB 4 33 D5 AGND 5 32 D6 IPOL 6 31 D7 TSA1204 30 D8 29 D9 AGND 8

display CQ31

Abstract: FS20 CQ-113
Contextual Info: TSA1204 Dual channel 12-bit 20Msps 120mW A/D converter Features • 0.5 Msps to 20 Msps sampling frequency ■ Adaptive power consumption: 120 mW @ 20 Msps, 95 mW@10 Msps Multiplexed outputs ■ INIB 4 33 D5 AGND 5 32 D6 IPOL 6 31 D7 TSA1204 30 D8 29 D9 AGND 8

Contextual Info: <:9/. @=A=5FGD9 <=;< CBI9D ?5F7<=A; D9?5J :NKZ[XNY b N\o^cdib m`g\t b 897D nrdo^cdib ^\k\]dgdot \o T`n5gj\_ b D^^jm_dib oj oc` a\pgo ^pmm`io \i_ `g`^omd^\g gda` o`no ja LHF =97<<4:8A WF83 WF93 WF: 0kg`\n` n`` ]`gjr o\]g` \i_ ijo`n91 b K`\qt gj\_ pk oj :59;fXD

Contextual Info: Quad, Current-Output, Serial-Input 16-/14-Bit DACs AD5544/AD5554 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VREFA B C D VDD D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 A1 SDI SDO RFBA INPUT REGISTER R DAC A REGISTER R DAC A IOUTA AGNDA RFBB

CQ31

Abstract: TSA1005 TSA1005-20IF TSA1005-20IFT TSA1005-40IFT TSA1005I-40IF TQFP48 Fn001 31C SOT23-6
Contextual Info: IG N TSA1005 DUAL-CHANNEL, 10-BIT, 20/40MSPS A/D CONVERTER S NOT FOR NEW DESIGN P 10-bit, dual-channel A/D converter in deep E D 33 D3 W 32 D4 IPOL 6 31 D5 E 29 D7 N 28 D8 AGND 10 27 D9 MSB INBQ 11 26 VCCBE 25 GNDBE AGND 12 13 14 15 16 23 24 GNDBI DVCC DGND

Contextual Info: DICE/DWF SPECIFICATION LTC1409 12-Bit, 800ksps Sampling A/D Converter with Shutdown 4 3 2 1 28 27 26 25 PAD FUNCTION 1. +AIN 15. D3 2. –AIN 16. D2 3. VREF 17. D1 4. REFCOMP 18. D0 5. AGND 19. OGND 6. D11 MSB 20. NAP/SLP 7. D10 21. SHDN 8. D9 22. RD 9. D8

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