D10N DIODE Search Results

D668N

Abstract: D798N400 d629n D4409 Leistungsdiode d452 BYY 56 D4409N D668N2000 D668
Contextual Info: A E G - A K T I EN GE SEL LS CHAFT 17E D • QOBWS 1 ■ AEGG Leistungsdioden Power diodes Diodes de puissance Typ Type V rrm If r m s m V' A If s m /¡ 2dt t-10nn* «vp •vjnnax 45°C t-IOnn* M" 45°G •vjmax kA kA fl?S A*s If a v m / ì c If a v m V TO

Contextual Info: S2E EUPEC D 3 4 0 3 5 1 ? Gcmaa?1! 3 5 a • upec 'T-O h r 7 Tvoenreihe/Tvoe range D 10 N 400 Elektrische Eigenschaften Electrical properties Höchstzulässlae Werte Periodische Vrrm Spitzensperrspannung Effektiver I frmsm Durchlaßstrom Dauergrenzstrom I favm

D10N diode

Abstract: D13N TECHNICAL DATA d9n diode d9n zener r2r resistor ladder TX-2-5-1 TC2411 TC2411-IB TC2411-KIT TP33
Contextual Info: Datasheet Advance Information TC2411 14-Bit, 1 GSPS Digital-to-Analog Converter with Standby Mode of Operation The TC2411 is a 14-bit, 1 GSPS digital-to-analog converter that delivers exceptional high-frequency performance. The TC2411 is designed to support

l1812

Abstract: AD9780BCPZ L1210 AD9783 CL453 j587 ADL5370 AVDD33 D06N intel g45 circuit diagram
Contextual Info: Dual 12-/14-/16-Bit, LVDS Interface, 500 MSPS DACs AD9780/AD9781/AD9783 FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs

Motorola D8N

Abstract: AD9781BCPZRL7
Contextual Info: Dual 12-/14-/16-Bit, LVDS Interface 600 MSPS DACs AD9780/AD9781/AD9783 Preliminary Technical Data FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier WCDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits useable outputs

AD9780BCPZ

Abstract: BAV99ZXCT AD9783 ADL5370 AVDD33 wcdma baseband 0x0547
Contextual Info: Dual 12-/14-/16-Bit, LVDS Interface 600 MSPS DACs AD9780/AD9781/AD9783 FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs

Contextual Info: User's Guide SLAU236A – November 2007 – Revised October 2008 DAC5681/81z/82z EVM 1 2 3 4 5 6 7 Contents Overview . 3 1.1 Purpose . 3

AT84AS001VTPY

Abstract: AT84AS001 AT84AS001CTPY AT84XAS001TP AT84AS001TP-EB D10N diode
Contextual Info: Features • • • • • • • • 12-bit Resolution 500 Msps Sampling Rate Full Power Input Bandwidth –3 dB > 1.5 GHz 1.1 Vpp Analog Input (Differential Only) AC or DC Coupled Analog Input with External Control Differential 100Ω or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs

atmel tbga

Abstract: AT84AS001VTPY atmel 030 D10N diode pin connection lvds wire AT84AS001 AT84AS001CTPY AT84XAS001TP N7 ATMEL
Contextual Info: Features • • • • • • • • 12-bit Resolution 500 Msps Sampling Rate Full Power Input Bandwidth –3 dB > 1.5 GHz 1.1 Vpp Analog Input (Differential Only) AC or DC Coupled Analog Input with External Control Differential 100Ω or Single-ended 50Ω PECL/LVDS Compatible Clock Inputs

D10N diode

Abstract: L1812 L1210 AD9780BCPZ D04P AD9783 BAV99ZXCT Motorola D8N ADL5370 AVDD33
Contextual Info: 正誤表 この製品のデータシートに間違いがありましたのでお詫びして訂正いたします。 この正誤表は、2009 年 10 月 27 日現在、アナログ・デバイセズ株式会社で確認した誤りを 記したものです。

10Gb CDR

Abstract: D14p N4 Amplifier 1 into 12 demultiplexer circuit diagram pin diagram 14 demultiplexer GR-253 TRCV0110G APD-SBSC-101
Contextual Info: Data Sheet March 28, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 8 mV sensitivity at 1 x 10–10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

GR-253

Abstract: TRCV0110G TRCV0110G2 agere 300-pin APDS
Contextual Info: Data Sheet June 17, 2002 TRCV0110G2 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • Integrated limiting amplifier with 10 mV sensitivity at 1e-10 bit error rate BER ■ Integrated clock recovery and 1:16 data demultiplexer (deMUX)

2n2222 sot23

Abstract: g28 SOT23 j141c W17 sot23 j167 blm41pg471sn1l Transistor J182 J119 c495 C538
Contextual Info: LatticeSC Communications Platform Evaluation Board: LFSC25E-H-EV User’s Guide April 2007 Revision: ebug16_01.3 Lattice Semiconductor LatticeSC Communications Platform Evaluation Board: LFSC25E-H-EV User’s Guide Introduction This user’s guide describes the LatticeSC Communications Platform Evaluation Board featuring the LatticeSC 900fpBGA FPGA device. The stand-alone evaluation PCB provides a functional platform for development and rapid

ASP-122952-01

Abstract: TCO-2111-491 KELTRON 06035A2R2CAT2A_DNI SLAU236 SH1101 c12347 ERJ-2RKF7500X TSW3082 ECJ-1V41E105M
Contextual Info: User's Guide SLAU236 – November 2007 TSW3082 and DAC5682z EVM 1 2 3 4 5 6 7 8 9 10 Contents Demonstration Kit Configuration Options . 2 1.1 DAC Component . 2

APD-SBSC-101

Abstract: GR-253 0364a
Contextual Info: Data Sheet September 17, 2002 TRCV0111G2 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

TRCV0111G

Abstract: GR-253
Contextual Info: Data Sheet September 17, 2002 TRCV0111G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

Contextual Info: Dual 12-/14-/16-Bit, LVDS Interface, 500 MSPS DACs AD9780/AD9781/AD9783 Data Sheet FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs

D10N diode

Abstract: AD9781BCPZ
Contextual Info: Dual 12-/14-/16-Bit, LVDS Interface, 500 MSPS DACs AD9780/AD9781/AD9783 Data Sheet FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs

GR-253

Abstract: TTRN0110G
Contextual Info: Data Sheet March 29, 2002 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features Applications Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction FEC rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s

Transistor h3 0925

Contextual Info: 12-bit 500 Msps ADC AT84AS001 Datasheet 1. Main Features • • • • • • • • • • • • • • 12-bit Resolution 500 Msps Sampling Rate Low Clock Latency Two Clock Cycles 1.1 Vpp Full Scale Analog input Range (Aids in Amplifier Interface)

3-D Matrix Europe SAS

Contextual Info: 12-bit 500 Msps ADC AT84AS001 Datasheet 1. Main Features • • • • • • • • • • • • • • 12-bit Resolution 500 Msps Sampling Rate Low Clock Latency Two Clock Cycles 1.1 Vpp Full Scale Analog input Range (Aids in Amplifier Interface)

NORTHBRIDGE* reflow

Abstract: pin diagram AMD phenom II - X4 RX980 990FX RD990 ATI RADEON reflow profile RD980 amd RADEON igp 215-0716046 AMD Phenom II x4
Contextual Info: AMD 990FX/990X/970 Databook Technical Reference Manual Rev 3.00 P/N: 48691_990FX_ds_nda 2012 Advanced Micro Devices, Inc. Trademarks AMD, the AMD Arrow logo, AMD Phenom, AMD Cool'n'Quiet, and combinations thereof, ATI, the ATI logo, Radeon, and CrossFire are trademarks of Advanced

Contextual Info: EV12DS130AGS Low Power 12-bit 3 GSps DAC with 4/2:1 MUX Datasheet Main Features • • • • • • • • • • • • • • • 12-bit Resolution 3 GSps Guaranteed Conversion Rate 6 GHz Analog Output Bandwidth 60 ps Full Scale Rise Time 4:1 or 2:1 integrated Parallel MUX Selectable

EV12DS130AGS

Abstract: EV12DS130Amgs EV12DS130A EV12DS130 CI-CGA255 NTK 025 EV12AS130A 3dfs 45
Contextual Info: EV12DS130AGS Low Power 12-bit 3 GSps DAC with 4/2:1 MUX Datasheet Main Features • • • • • • • • • • • • • • • 12-bit Resolution 3 GSps Guaranteed Conversion Rate 6 GHz Analog Output Bandwidth 60 ps Full Scale Rise Time 4:1 or 2:1 integrated Parallel MUX Selectable