D 1163 A Search Results

U77-1163-2010P

Contextual Info: 8 7 4 5 6 3 2 1 REVISIONS REV DESC RIPTIO N DATE A PROPOSAL AUG06/09 B PLATING OPTION CONFIGURATION AUG17/09 SFP+ PRESS FIT CAGE P/N: U77-1163-2010P IF ORDERED SEPERATELY APPRD D D 16.26 15.01 SFP+ PRESS FIT CAGE (P/N: U77-A1639-X001 IF ORDERED SEPERATELY)

U77-1163-2010P

Abstract: 4548B
Contextual Info: 8 7 4 5 6 3 2 1 REVISIONS REV. DESCRIPTION ECN/E-R A PROPOSAL DATE APPROVED SEP.10,09 A.G. SFP+ PRESS FIT CAGE P/N: U77-1163-2010P IF ORDERED SEPERATELY D D 16.26 15.01 SFP+ SOLDERING PINS CAGE (P/N: U77-A163X-X001 IF ORDERED SEPERATELY) C C 55.20 2.30 5.84

jedec package MO-220 0.4 pitch

Abstract: jedec package MO-220 burr MO-220 MO-220 packaging
Contextual Info: R E V REV A 1 S 1O N S D E S C R 1P T I O N RE LE ASE TO DOCUMENT CONTROL E.C.M. DATE BY/APP'D 1163 08/15/2003 AS/TL/SN □ 3 . 6 DIMENSIONS ARE IN MILLIMETERS ( 4 ( 28X TYP ) DIMENSIONS IN ( ) FOR REFERENCE ONLY 0 . 6 ) -I ( 28X 0.25) ( 24X 0.5) C RECOMMENDED LAND PATTERN

LVEL16

Abstract: NB6L16 NBSG16
Contextual Info: NB6L16 2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/ Driver/Translator Buffer The NB6L16 is a high precision, low power ECL differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With

Contextual Info: NB6L11 2.5V/3.3V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the

D 1163 A

Abstract: redresseur 2S1163 Scans-0017256
Contextual Info: PHILIPS 1163 SINGLE-ANODE RECTIFYING VALVE, gas filled TUBE REDRESSEUR MONOPLAQUE à gaz EINANODIGE GLEICHRICHTERRÖHRE, gasgefüllt Application; battery charger 6 A per val*- c, max. 36 Pbcel 1s chargeur d'accumulateurs (6 A par tube,max 36 éléments Pb)

Contextual Info: 2SK1163, 2SK1164 Silicon N-Channel MOS FET HITACHI November 1996 Application High speed power switching Features • Low on-resistance • High speed switching • Low drive current • No secondary breakdown • Suitable for switching regulator and DC-DC converter

Contextual Info: Catalog 1307612 A I V I F » Single Port, Side Entry Modular Jacks Revised 7-01 High Performance Modular Jacks Unshielded ^ .5 9 5 Positions/Contacts Keyed Tray Packaging Part Numbers 8/8 - 1116518-1 Photo 109319-5 Shielded Tray Packaging Part Numbers Panel

Silicon Photocells

Abstract: MS4A FERRANTI ELECTRONICS MS10 MS11BE MS11A MS11AE MS11B ferranti MS6B
Contextual Info: INSTRUMENT PHOTO-CELLS S T A N D A R D R A N G E S IL IC O N M E S A P H O T O -C E L L S Ferranti's extensive production facility, established over the past eighteen years, for the manufacture of Silicon photo-cells has generated a complete range of devices from micro-miniature to large area

Contextual Info: ##?rV K-Band Medium Power HEMT Amplifier_APH196C Features • RF frequency: 17 to 30 GHz • Linear gain: >16 dB • PldB: >22 dBm Typical • Unconditionally stable • Balanced design provides excellent input and output VS WR • DC power: 4 Vdc at 400 mA

cat1161

Abstract: i2c/data sheet for Dc motor 5volt project motor dc 6v
Contextual Info: CAT1161, CAT1162 & CAT1163 Supervisory Circuits with I2C Serial EEPROM Memory and Watchdog Protection FEATURE S H E E T FL AS H • Serial E E PR O M • Parallel E E PR O M • N VRA M • Digitally Programmable Potentiometers • Microprocessor Supervisors

1SS308

Contextual Info: 1SS308 SILICON EPITAXIAL PLANAR TYPE ULTRA HIGH SPEED SWITCHING APPLICATION. + 0.2 . Small Package SC-59 MOD 2.8-0.3 . Low Forward Voltage V f = 0.92V Typ. 1 .6 - 0 1 f02 . Fast Reverse Recovery Time trr= l »6ns(Typ.) . Small Total Capacitance CT= 2 .2pF(Typ.)

2SD1165A

Abstract: D 1163 A 2SD1084 D1138 2sc2373 2Sd1165 2sD1307 2SD1961 2SD1265 1170 T
Contextual Info: - 232 - m € Type No. € tt Maniif. =M H SANYO nt s TOSHIBA a b NEC 31 HITACHI m ± il FUJITSU ft T MATSUSHITA jr. H MITSUBISHI □ — A ROHM 2 S D 1135 <- s a 2 S D 1136 * s a 2 S D 1137 ✓ s a 2SD743A 2SD857 2SD1896 s a 2SC2336A 2SC2660 2SD1562A 2 S D 1138 ,

Contextual Info: 3 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED BY TYCO ELECTRONICS CORPORATION. FOR PUBLICATION - 2 - ALL RIGHTS RESERVED. REVISIONS LOC DIST HM 00 LTR D DESCRIPTION REV ECO—0 6 —0221 60 DATE DWN APVD 300 C T 0 6 LH CD DIMENSIONS ARE MAXIMUM UNLESS

TC511632

Abstract: TC511632FL
Contextual Info: TOSHIBA TC511632FL/FTL-70/85/10 PRELIMINARY SILICON GATE CMOS 32,768 WORD x 16 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1 1632FL7FTL is a 5 1 2K b t high speed C M O S p s e u d o static RAM organized as 3 2 ,7 6 8 w o rd s by 16 bits. The T C 511632FL7F TL utilizes a o n e tra n s is to r dyn a m ic m e m o ry cell w ith C M O S peripheral circuitry to p rovide high capacity, high

Contextual Info: 3 4 TH IS DRAWING IS U N P U B L IS H E D . COPYRIGHT RELEASED BY 1YC0 FOR ALL ELECTRONICS CORPORATION. 2 PUBLIC ATIO N RIGHTS R EVIS IO N S R E S ER V ED . A/ P LTR D E S C R IP TIO N B DATE REV PER E C R - 1 0 - 0 1 8 5 0 1 DWN APVD DZ MQ.W 9SEP2010 MATERIAL: HOUSING - PCT POLYESTER, BLACK,

Contextual Info: '1 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 2 3 RELEASED BY TYCO ELECTRONICS CORPORATION. FOR PUBLICATION - - LOC ALL RIGHTS RESERVED. REVISIONS D IS T AA 22 LTR DESCRIPTION A MATERIAL: - PBT TERM INAL - 0 .3 6 [ .0 1 4 ] WITH 1 . 2 7 fjm [ .0 0 0 0 5 0 ]

1le dc-dc

Abstract: SI43A
Contextual Info: SMT Power Inductor SI43A Type Features • ■ ■ ■ ■ ■ Low profile 2.5mm max. height , SMD type. Unshielded. Self-leads, suitable for high density mounting. High energy storage and low DCR. Provided with embossed carrier tape packing. Idel for power source circuits, DC-DC converters, DC-AC inverters

2SK1264

Abstract: 2SK12 H150
Contextual Info: P o w e r F-MOS FET 2SK12Ó4 2SK1264 Silicon N-channel Power F-MOS FET Package Dimensions • Features • L ow ON r e s is ta n c e R ds on : R DS (on) l = 0 . 7 i i (ty p .) Unit: mm • High sw itch in g ra te : tf = 3 6 n s (ty p .) • No seco n d a ry breakdow n

Contextual Info: Belegungsplan Loading-Plan Schirm Shield Gelb Yellow Orange Orange H-ir-1 Wei 8 White Blau Blue Ubertragungseigenschaften nach ISO/IEC 11801:2002: Class 0. Temperaturbereich: -40*C .W0*C transmission properties in accordance with ISO/IEC 11801:2002: Class 0.

2SC3888A

Abstract: 2SC3888
Contextual Info: SILICON NPN TRIPLE DIFFUSED MESA TYPE 2SC3888A HOR I Z O N T A L D E FLECTION O U T P U T FOR HIGH Unit in mm RES O L U T I O N DISPLAY. 1 5 .5 ± 0 .5 HIGH S PEED SWIT C H I N G R E GULATOR OUTP U T APPLICATIONS. $ 3,6 ± 0.2 L5 \ . High Voltage : V q j o S1500V

Contextual Info: 2 4 3 5 7 6 P ld s fic RJI Kabel AWG 22 P i t Cable M Steckgeometrie RJ45 nach IEC 60603-7 22 P la s tic H10x1 Belegungsplan Loading-Plan Schirm Shield Gelb Yellow Orange Orange Wei 8 White Blau Blue 2 3 6 13,9 Ubertragungseigenschaften nach ISO/IEC 11801:2002: Class 0.

Contextual Info: 147 Central Avenue Hackensack, New Jersey 07601 Tel: 201-489-8989 • Fax: 201-489-6911 CHICAGO MINIATURE LAMP, INC. WHERE INNOVATION COMES TO LIGHT T-1 StatusPak Circuit Board Indicators D E S C R I PT I O N A N D F E AT U R E S .095±.020 .182/.192 .192

Contextual Info: "PANASONIC INDL/ELEK -CIO 7E De | l^ 3 E ö SE GDDt,7bh 3 | ~ 6 ?31852.PANASONIC.IN.OLtELECTRONIC 72C 0 6 7 66 - r. qT~5M*I MN6283 M N6283 $4 CMOS/CMOS Circuit for Time-Base Generators Ä - J - B S Ä E /P in A ssignm ent