CY7C1514JV18 Search Results

CY7C1514JV18 Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CY7C1514JV18		Cypress Semiconductor	72-Mbit QDR-II SRAM 2-Word Burst Architecture	Original	PDF	416.49KB	26
CY7C1514JV18-250BZXC		Cypress Semiconductor	72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V	Original	PDF	989.13KB	26

CY7C1514JV18 Price and Stock

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Infineon Technologies AG CY7C1514JV18-250BZXC IC SRAM 72MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1514JV18-250BZXC	Tray	75		1	1 $143.73 10 $132.41 100 $124.76 1000 $124.76 10000 $124.76	Buy Now
Rochester Electronics LLC CY7C1514JV18-250BZXC IC SRAM 72MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1514JV18-250BZXC	Bulk			3	1 - 10 $114.66 100 $114.66 1000 $114.66 10000 $114.66	Buy Now
Cypress Semiconductor CY7C1514JV18-250BZXC SRAM Chip Sync Dual 1.8V 72M-bit 2M x 36 0.45ns 165-Pin FBGA Tray
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Verical	CY7C1514JV18-250BZXC		96		25	1 - 10 - 100 $130.93 1000 $117.14 10000 $110.25	Buy Now
Rochester Electronics	CY7C1514JV18-250BZXC		201		1	1 - 10 - 100 $104.74 1000 $93.71 10000 $88.20	Buy Now

CY7C1514JV18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth ■	Original	CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit CY7C1510JV18 CY7C1525JV18 CY7C1512JV18	PDF
CY7C1512JV18 Abstract: CY7C1514JV18 CY7C1525JV18 Contextual Info: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth CY7C1525JV18 – 8M x 9	Original	CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit CY7C1512JV18 CY7C1514JV18 CY7C1525JV18	PDF
CY7C1510JV18 Abstract: CY7C1512JV18 CY7C1514JV18 CY7C1525JV18 Contextual Info: CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 267 MHz clock for high bandwidth ■	Original	CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit CY7C1510JV18 CY7C1512JV18 CY7C1510JV18 CY7C1512JV18 CY7C1514JV18 CY7C1525JV18	PDF
CY7C1512JV18 Abstract: CY7C1514JV18 CY7C1525JV18 Contextual Info: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth CY7C1525JV18 – 8M x 9	Original	CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit CY7C1512JV18 CY7C1514JV18 CY7C1525JV18	PDF
Contextual Info: THIS SPEC IS OBSOLETE Spec No: 001-14435 Spec Title: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18, 72-MBIT QDR R II SRAM 2-WORD BURST ARCHITECTURE Sunset Owner: Anuj Chakrapani (AJU) Replaced by: None CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst	Original	CY7C1525JV18 CY7C1512JV18 CY7C1514JV18, 72-MBIT CY7C1514JV18 CY7C1525JV18 CY7C1512JV18	PDF