CY7C1334H Search Results
CY7C1334H Datasheets (4)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| CY7C1334H |
|
2-Mbit (64K x 32) Pipelined SRAM with NoBL Architecture | Original | 580.7KB | 13 | ||
| CY7C1334H-133AXC |
|
2-Mbit (64K x 32) Pipelined SRAM with NoBL Architecture | Original | 580.67KB | 13 | ||
| CY7C1334H-166AXC |
|
2-Mbit (64K x 32) Pipelined SRAM with NoBL Architecture | Original | 580.68KB | 13 | ||
| CY7C1334H-166AXI |
|
2-Mbit (64K x 32) Pipelined SRAM with NoBL Architecture | Original | 580.67KB | 13 |
CY7C1334H Price and Stock
Infineon Technologies AG CY7C1334H-166AXCIC SRAM 2MBIT PARALLEL 100TQFP |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1334H-166AXC | Tray | 144 |
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Buy Now | ||||||
Cypress Semiconductor CY7C1334H-166AXCCY7C1334H-166AXC |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CY7C1334H-166AXC | 93 | 57 |
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Buy Now | ||||||
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CY7C1334H-166AXC | 373 | 1 |
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Buy Now | ||||||
CY7C1334H Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: CY7C1334H PRELIMINARY 2-Mbit 64K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE |
Original |
CY7C1334H 166-MHz 133-MHz 100-pin CY7C1334H | |
|
Contextual Info: CY7C1334H PRELIMINARY 2-Mbit 64K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE |
Original |
CY7C1334H 166-MHz 133-MHz 100-pin CY7C1334H | |
CY7C1334HContextual Info: CY7C1334H 2-Mbit 64K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability |
Original |
CY7C1334H 166-MHz 133-MHz 100-pin CY7C1334H | |
CY7C1334HContextual Info: CY7C1334H 2-Mbit 64K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability |
Original |
CY7C1334H 166-MHz 133-MHz 100-pin CY7C1334H | |
CY7C1334HContextual Info: CY7C1334H 2-Mbit 64K x 32 Pipelined SRAM with NoBL Architecture Functional Description[1] Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability |
Original |
CY7C1334H 166-MHz 133-MHz 100-pin CY7C1334H |