CTK BUFFER Search Results

CHEERTEK

Abstract: CT212 ct212s Serial Ports cheertek AVD18 4-pin 27mhz crystal CT-212S MA487 "Frame rate conversion" CRC-32
Contextual Info: CT212 PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE CTK CONFIDENTIAL, NO DISCLOSURE CT212 DVB Decoder Chip Specification Rev. 0.9 Page 1 The above information is the exclusive intellectual property of Cheertek Inc. and shall not be disclosed, distributed or reproduced without permission from Cheertek Inc.

ctk 25 4 tube

Abstract: CTK sot-353
Contextual Info: SN74LVC1G06 www.ti.com SCES295V – JUNE 2000 – REVISED NOVEMBER 2012 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G06 FEATURES 1 • 2 • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation

Contextual Info: SN74LVC1G06 www.ti.com SCES295W – JUNE 2000 – REVISED DECEMBER 2013 Single Inverter Buffer/Driver With Open-Drain Output Check for Samples: SN74LVC1G06 FEATURES DESCRIPTION • This single inverter buffer/driver is designed for 1.65V to 5.5-V VCC operation.

Contextual Info: SN74LVC1G06 www.ti.com SCES295V – JUNE 2000 – REVISED NOVEMBER 2012 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G06 FEATURES 1 • 2 • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation

CTK sot-353

Contextual Info: SN74LVC1G06 www.ti.com SCES295W – JUNE 2000 – REVISED DECEMBER 2013 Single Inverter Buffer/Driver With Open-Drain Output Check for Samples: SN74LVC1G06 FEATURES DESCRIPTION • This single inverter buffer/driver is designed for 1.65V to 5.5-V VCC operation.

ctk 25 4 tube

Abstract: ctk 15 2 tube c06f marking code CTK C06R marking CTK SCES295V ti C065 ctk 15-2 tube package marking c06F
Contextual Info: SN74LVC1G06 www.ti.com SCES295V – JUNE 2000 – REVISED NOVEMBER 2012 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G06 FEATURES 1 • 2 • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation

Contextual Info: SN74LVC1G06 www.ti.com SCES295W – JUNE 2000 – REVISED DECEMBER 2013 Single Inverter Buffer/Driver With Open-Drain Output Check for Samples: SN74LVC1G06 FEATURES DESCRIPTION • This single inverter buffer/driver is designed for 1.65V to 5.5-V VCC operation.

Contextual Info: SN74LVC1G06 www.ti.com SCES295V – JUNE 2000 – REVISED NOVEMBER 2012 SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G06 FEATURES 1 • 2 • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation

Contextual Info: 2 CY2502 Spread Aware , Two-output Zero Delay Buffer Features Key Specifications • Spread Aware™ designed to work with SSFT reference signals • Well-suited to both 33- and 66-MHz designs • 3.3V power supply • On-chip 25Ω damping resistors • Available in 8-pin SOIC package

TL16PIR552

Contextual Info: New Product Highlights TL16PIR552 Dual UART with Dual IrDA and 1284 Parallel Port I Description ~ The TL16PIR552 has a dual-channel universal asyn­ chronous receiver/transmitter UART , The UART is similar to the TL16C550C, Each channel performs serial-to-parallel conversion on data characters

Contextual Info: SAM SU NG SE MI CONDU CT OR INC OS KS74HCTLS ^ D E | 7T b 4145 B0 0b3 ô5 □ | 3 1 8-Bit Serial-in!Paraliei-0 ut Shift Registers FEATURES DESCRIPTION • AND—Gated enablefdisable serial Inputs » Fully buffered clock and serial Inputs • Direct clear

CY2502

Abstract: CY2502SC CY2502SCT 2318N
Contextual Info: 2 CY2502 Spread Aware , Two Output Zero Delay Buffer Features Key Specifications • Spread Aware™ - Designed to Work with SSFT Reference Signals • Well Suited to Both 33 and 66 MHz Designs • 3.3V Power Supply • On Chip 25Ω Damping Resistors • Available in 8-pin SOIC Package

CY2502

Abstract: CY2502SC CY2502SCT
Contextual Info: 2 CY2502 Spread Aware , Two-output Zero Delay Buffer Features Key Specifications • Spread Aware™ designed to work with SSFT reference signals • Well-suited to both 33- and 66-MHz designs • 3.3V power supply • On-chip 25Ω damping resistors • Available in 8-pin SOIC package

CY2305

Contextual Info: ADVANCE INFORMATION CY2305A 3.3V 200-MHz Zero Delay Buffer Features Functional Description • 10-MHz to 200-MHz operating range • Total Timing Budget Impact TTBI @ 200 MHz < 650 ps • Five low-skew outputs — Output-output skew < 200 ps — Device-device skew < 500 ps

CY2DP818

Abstract: CY2DP818ZC CY2DP818ZCT CY2DP818ZI CY2DP818ZIT 38PIN
Contextual Info: ComLink Series CY2DP818 1:8 Clock Fanout Buffer Features • • • • • • • • • • • • Description Low-voltage operation VDD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or LVTTL 8 pair of LVPECL outputs Drives a 50-ohm load

CY29962

Abstract: CY29962AI MPC9600
Contextual Info: 62 CY29962 2.5V/3.3V, 150-MHz Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • • 2.5V or 3.3V operation Output frequency up to 150 MHz Supports PowerPC and Pentium processors 21 clock outputs: drive up to 42 clock lines

Contextual Info: Z9104 Variable Delay Motherboard Clock Buffer Features Table 1. Feedback Scale Select Codes Mode • Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path • Two-kV ESD protected • Six low-skew clocks generated

cnet abb

Abstract: 686B811U01 composer modicon 177A550U01 freelance 2000 xerox DCU2000G abb harmony opc NC20
Contextual Info: Conductor NT Data Sheet Highlights Conductor NT is a Windows 2000 Human System Interface HSI that provides a suite of operator-directed features and functions that are ergonomically designed to facilitate process monitoring, control, fault mitigation, and optimization. Conductor NT supports a wide range of

Contextual Info: 62 CY29962 2.5V/3.3V, 150-MHz Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • • 2.5V or 3.3V operation Output frequency up to 150MHz Supports PowerPC and Pentium® processors 21 clock outputs: drive up to 42 clock lines

A48A

Abstract: CY29962 CY29962AI MPC9600
Contextual Info: 62 CY29962 2.5V/3.3V, 150-MHz Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • • 2.5V or 3.3V operation Output frequency up to 150MHz Supports PowerPC and Pentium® processors 21 clock outputs: drive up to 42 clock lines

Z9104

Abstract: IMIZ9104DAB IMIZ9104DABT MPC932P SC25
Contextual Info: Z9104 Variable Delay Motherboard Clock Buffer Features Table 1. Feedback Scale Select Codes Mode • Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path • Two-kV ESD protected • Six low-skew clocks generated

CY2DP818

Abstract: CY2DP818ZXC
Contextual Info: CY2DP818 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3V ■ 1:8 fanout The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ Operation to 350 MHz

CY23S09SI-1H

Abstract: CY23S05 CY23S05SC-1 CY23S09
Contextual Info: 05 CY23S09 CY23S05 Low-Cost 3.3V Spread Aware Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay up to 100-/133-MHz frequencies, and have higher drive than

CY2DP814

Abstract: CY2DP814SC CY2DP814SCT CY2DP814SI CY2DP814SIT CY2DP814ZC CY2DP814ZCT CY2DP814ZI CY2DP814ZIT TPA Series application notes
Contextual Info: ComLink Series CY2DP814 1:4 Clock Fanout Buffer Features Description • • • • • • • • • Low voltage operation VDD = 3.3V 1:4 fanout Single-input configurable for LVDS, LVPECL, or LVTTL Four differential pairs of LVPECL outputs Drives 50-ohm load