CPU BUS ALLOCATION CONTROL Search Results
CPU BUS ALLOCATION CONTROL Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| 9519ADM/B | Rochester Electronics LLC | 9519A - Universal Interrupt Controller |
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| AM79C961AVI | Rochester Electronics LLC | Full Duplex 10/100 MBPS ETHERNET Controller for PCI Local Bus, PCNET- ISA II jumperless |
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| AM79C961AVC\\W | Rochester Electronics LLC | Full Duplex 10/100 MBPS ETHERNET Controller for PCI Local Bus, PCNET- ISA II jumperless |
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| D8274 | Rochester Electronics LLC | 8274 - Multi-Protocol Serial Controller (MPSC) |
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| MD82510/B | Rochester Electronics LLC | 82510 - Serial I/O Controller, CMOS, CDIP28 |
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CPU BUS ALLOCATION CONTROL Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
MCR 100-6 P
Abstract: LAN9000 LAN91C96I-MU manchester encoder 10BASE2 10BASE5 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I
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lan91c96imcr 100-6 plan9000lan91c96i-mu+6 | |
VLSI Technology
Abstract: 10BASE2 10BASE5 LAN9000 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I-MU
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lan91c96ilan91c92lan91c94vlsi technology+6 | |
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Contextual Info: [P K IILO fiilD M A lS V in te i 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM MESI Cache Consistency Protocol Hardware Cache Snooping Maintains Consistency with Primary Cache via Inclusion Principle Flexible User-Implemented Memory Interface Enables Wide Range of |
OCR Scan |
82495xp82490xp208-lead84lead | |
xxxjxContextual Info: in t e i 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-Way, Set Associative, Secondary Cache for i860 xp Microprocessor 50 MHz “No Glue” Interface with CPU Configurable — Cache Size 256 or 512 Kbytes — Line Width 32, 64 or 128 Bytes — Memory Bus Width 64 or 128 Bits |
OCR Scan |
82495xp82490xp10-3acontroiler/82490xp+1 | |
est 7502 b data sheetContextual Info: P E H I1 0 IM 1 D B M IV i n Dt t e : s. i 991 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM • Two-Way, Set Associative, Secondary Cache for i860 XP Microprocessor MESI Cache Consistency Protocol ■ 50 MHz “No Glue” Interface with CPU Maintains Consistency with Primary |
OCR Scan |
82495xp82490xp10-3acontroller/82490xp+1 | |
MTA02
Abstract: i860Xp MT 8222 Intel 82495 Cache Controller 3ce-14 LR1 D09 ahy 103 i860 64-Bit Microprocessor Performance Brief MCache Second Level Cache-Controller
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OCR Scan |
82495xp82490xpcontroller/82490xpmta02+9 | |
PDIUSBD12PWAAContextual Info: PDIUSBD12 USB peripheral controller with parallel bus Rev. 11 — 29 September 2009 Product data sheet 1. General description The PDIUSBD12 is a cost- and feature-optimized USB peripheral controller. It is normally used in microcontroller-based systems and communicates with the system microcontroller |
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pdiusbd12pdiusbd12pwaa | |
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Contextual Info: STANDARD MICROSYSTEMS CORPORATION, 90 Artoy Drive, Hauppauge, NY 11788 516 435-6000 Fax (516) 231-6004 SMC91C92 DIVISION Single-Chip Ethernet Controller with RAM FEATURES • • • • • • • • • • Single-Chip Ethernet Controller 4608 Bytes of On-Chip RAM |
OCR Scan |
smc91c9210base-t16-bit | |
PDIUSBD12PWTM
Abstract: PDIUSBD12PWAA CD00222704 pdiusbd12pwt
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pdiusbd12cd00222704pdiusbd12pwtmpdiusbd12pwaa+1 | |
A1218
Abstract: LAN9000 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I LAN91C96I-MU LAN91C96IQFP LAN91C96ITQFP
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lan91c96ilan91c92lan91c94a1218+6 | |
COL100
Abstract: LAN83C694 LAN9000 LAN91C100
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lan91c100100base-t100base-tx100base-t4+4 | |
10BASE5
Abstract: LAN9000 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I LAN91C96IQFP LAN91C96ITQFP
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lan91c96i10base5lan9000lan91c100fd+4 | |
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Contextual Info: DEC 21 ¡992 SMC91C90 STANDARD MICROSYSTEMS CORPORATION i ADVANCE INFORMATION COMPONENT PRODUCTS DIVISION 80 Artov Drive. Hauccauge. NY 11788 1516 435-6000 Fax 1516) 231-6004 Single-Chip Ethernet Controller FEATURES Single-Chip Ethernet Controller Supports IEEE 8 02.3 ANSI 8802-3) and |
OCR Scan |
smc91c9010base-t16-bit | |
SMC91C92
Abstract: 10BASE2 10BASE5 SMC91C100 SMC91C94 arbiter decoder -1996
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smc91c9416-bitsmc91c9210base2+3 | |
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Intel 82495 Cache Controller
Abstract: i860Xp J222J Si 7661 replacement TA 7503 TAG 9245 cache controller i860 64-Bit Microprocessor Performance Brief MCache yx 861
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OCR Scan |
82495xp82490xpcontroller/82490xpintel 82495 cache controller+9 | |
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Contextual Info: LAN91C96I Non-PCI Single-Chip Full Duplex Ethernet Controller Datasheet Product Features Non-PCI Single-Chip Ethernet Controller Pipelined Data Path Fully Supports Full Duplex Switched Ethernet Handles Block Word Transfers for any Alignment |
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lan91c96ilan91c92lan91c94 | |
10BASE5
Abstract: LAN9000 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I LAN91C96IQFP LAN91C96ITQFP
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lan91c96ilan91c92lan91c9410base5+5 | |
68000 mmu
Abstract: LAN91C96 10BASE2 10BASE5 LAN9000 LAN91C100FD LAN91C110 LAN91C94
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lan91c9668000 mmu10base210base5+4 | |
SPRU610
Abstract: Architecture of TMS320C64X TMS320C64X SPRU234 driving point and transfer giga media converter C6000 SPRU190 TMS320C6000 Memory Reference Guide spru610
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spra994tms320c64xtms320c6000spru610+7 | |
10BASE5
Abstract: LAN9000 LAN91C100FD LAN91C110 LAN91C94 LAN91C96I LAN91C96IQFP LAN91C96ITQFP
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lan91c96ilan91c92lan91c9410base5+5 | |
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Contextual Info: V96xPBC Rev.B2 LOCAL BUS to PCI BRIDGE CONTROLLER FOR i960 Cx/Hx/Jx/Sx, 486® and PowerPC 401Gx PROCESSORS ❒ Glueless interface between Intel’s i960 processors and the industry standard PCI Bus ❒ Fully compliant with PCI 2.1 specification ❒ Configurable for primary master, bus master, |
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v96xpbc401gx8/16-bit2348g | |
LAN9000
Abstract: LAN91C100FD LAN91C110 LAN91C94 LAN91C96I LAN91C96I-MU LAN91C96IQFP LAN91C96ITQFP
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lan91c96ilan91c92lan91c94lan9000+5 | |
9346 EEPROM
Abstract: SMC91C90
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OCR Scan |
231-60msmc91c9010base-t9346 eeprom | |
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Contextual Info: LAN91C110 REV. A PRELIMINARY FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications FEATURES !" Dual Speed CSMA/CD Engine 10 Mbps and 100 Mbps !" Built-in Transparent Arbitration for Slave Sequential Access Architecture !" Compliant with IEEE 802.3 100BASE-T |
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lan91c11016-bit100base-t100base-tx+2 | |