CODE 16E TRIGGER Search Results

skt552

Abstract: SKT55 code 16e trigger rs048 skt552/16e
Contextual Info: Date:- 4 Feb 2002 Data Sheet Issue:- 3 Phase Control Thyristor Type SKT552/16E Absolute Maximum Ratings VOLTAGE RATINGS Parameter MAXIMUM UNITS VDRM Symbol Repetitive peak off-state voltage, note 1 1600 V VDSM Non-repetitive peak off-state voltage, (note 1)

GMS800

Abstract: HMS81004E HMS81008E HMS81016E HMS81020TL HMS81024E HMS81032E HYNIX 128 Mbit 81C5EVA
Contextual Info: HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS HMS81004E HMS81008E HMS81016E HMS81024E HMS81032E User’s Manual Ver. 1.00 Version 1.00 Published by SP MCU Application Team 2001 Hynix Semiconductor, Inc. All right reserved. Additional information of this manual may be served by Hynix Semiconductor offices in Korea or Distributors and Representatives listed at address directory.

clause 22 phy registers

Abstract: 7824 MA datasheet VSC8211
Contextual Info: VSC8211 Datasheet Single Port 10/100/1000BASE-T, 1000BASE-X, and 100BASE-FX PHY Ideally suited for Gigabit uplinks on Fast Ethernet switches, Fiber Optics, Media Converter applications, and GBIC/SFP modules, Vitesse's industry-leading low power VSC8211 integrates a high-performance 1.25Gbps SerDes and a triple

VSC8211

Abstract: vsc8211xvw RGMII to SGMII PHY VSC8211VW clause 22 phy registers Clause-37 VSC8221 MDIO clause 22 MDIO clause 45 RGMII to SGMII
Contextual Info: VSC8211 Datasheet Single Port 10/100/1000BASE-T, 1000BASE-X, and 100BASE-FX PHY 1 General Description Ideally suited for Gigabit uplinks on Fast Ethernet switches, Fiber Optics, Media Converter applications, and GBIC/SFP modules, Vitesse's industry-leading low power VSC8211

74AC399

Abstract: 74AC399PC 74AC399SC 74ACT399 74ACT399SC 74ACT399SJ M16A MS-001 N16E
Contextual Info: A I R C H June 1988 I L D Revised O ctober 1998 S E M IC D N D U C T O R tm 74AC399 • 74ACT399 Quad 2-Port Register General Description Features T he AC /AC T399 is the logical equivalent of a quad 2-input m ultiplexer feeding into four edge-triggered flip-flops. A

74AC174

Abstract: 74AC174PC 74AC174SC 74AC174SJ 74ACT174 M16A M16D N16E DS00993
Contextual Info: Revised January 1999 E M IC O N D U C T G R T M 74AC174 • 74ACT174 Hex D-Type Flip-Flop with Master Reset General Description Features T he AC /AC T174 is a high-speed hex D -type flip-flop. The device is used p rim arily as a 6-bit edge-triggered storage

HMS81024E

Abstract: Hynix E NAND hynix nand 81032e 2L TRANSISTOR HYNIX lot date code marking codes 2u Diode remocon mcu SOP-56 R20 marking
Contextual Info: HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS HMS81004/08/16/24/32E HMS81020/32TL User’s Manual Ver. 2.00 REVISION HISTORY VERSION 2.00 (NOV., 2001) 1. Modify the maximum supply voltage on page 12. 2. Add the chapter 17 and 18. Version 2.00 Published by

a215c

Abstract: 74F109 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E
Contextual Info: A p riM 9 8 8 Revised January 1999 74F109^ Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to Cp sets Q to LOW level T he F 1 09 consists of tw o high-speed, com pletely indepen­ dent transition clocked JK flip-flops. The clocking operation

Contextual Info: MagnaChip SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS HMS81004/08/16/24/32E HMS81020/32TL User’s Manual Ver. 2.01 REVISION HISTORY VERSION 2.00 (NOV., 2001) 1. Modify the maximum supply voltage on page 12. 2. Add the chapter 17 and 18. VERSION 2.01 (MAY., 2002)

Contextual Info: PM8389 SMC-L Preview Storage Management Controller Lite AM 46 4: :1 09 04 20 r, be ov em 4N ,0 DEVELOPMENT ENVIRONMENT & EJTAG EMULATOR ay sd ur Th n co PM8389 SMC-L Peripheral Subsystem Memory I/F Mux 64 K Scratch RAM /w Parity Memory Controller Pa r Peripheral

Contextual Info: PM8389 SMC-L Preview Storage Management Controller Lite FEATURES GENERAL PURPOSE INPUT/OUTPUT GPIO PM The PM8389 SMC-L is a highly integrated MIPS-based processor with a set of storage system peripherals: internal memory, Two-wire Interface (TWI), Universal Asynchronous

transmitter circuit in GPR

Abstract: PM8383 MULTIMASTER SAS controller chip "tape storage"
Contextual Info: PM8389 SMC L Released Storage Management Controller Lite FEATURES The PM8389 SMC-L is a highly integrated MIPS-based processor with a set of storage system peripherals: internal memory, Two-wire Interface TWI , Universal Asynchronous Receiver/Transmitter (UART), General

AN-90

Abstract: M16A MM74C175 MM74C175M MM74C175N MS-001 N16E
Contextual Info: O ctober 1987 Revised January 1999 S E M IC O N D U C TO R T M MM74C175 Quad D-Type Flip-Flop General Description All inputs are protected from static discharge by diode clam ps to V c c and GND. T h e M M 74C 175 consists of four positive-edge triggered Dtype flip-flops im plem ented with m onolithic C M O S te ch n ol­

PM8393

Abstract: 4 channel pwm transmitter receiver Logic Card of PA fan "tape storage" AT/PM8393
Contextual Info: PM8393 SMC Preliminary Storage Management Controller PM 01 05 20 t, us ug 8A ay nd Mo n co In rtm Pa PM8393 SMC 128K Scratch RAM /w Parity FC Interface Peripheral Subsystem Memory I/F Mux of Memory Controller MultimasterTw MultimasterTw o Wire Interface o Wire Interface

74F161

Abstract: 74F161A 74F161APC 74F161ASJ 74F163A M16A M16D N16E 74F163
Contextual Info: Revised July 1999 EMICONDUCTGRTM 74F161A • 74F163A Synchronous Presettable Binary Counter General Description Features T he 74F 161A and 74F163A are high-speed synchronous m odulo-16 binary counters. T h e y are synchronously pre­ settable for application in program m able dividers and have

74F398

Abstract: 74F399 74F399PC 74F399SC 74F399SJ M16A M16D N16E
Contextual Info: Revised N ovem ber 1998 S E M IC O N D U C T O R IM 74F398 • 74F399 Quad 2-Port Register General Description sion of the F398, with only th e Q outputs of the flip-flops available. T he F398 and F399 are th e logical equivalents of a quad 2input m ultiplexer feeding into four edge-triggered flip-flops.

74F174

Abstract: 74F174PC 74F174SC 74F174SJ M16A M16D MS-001 N16E
Contextual Info: r 1 9 ? !, iQ Q Q Revised July 1999 EMICONDUCTGRTM 74F174 Hex D-Type Flip-Flop with Master Reset General Description Features T he 74F174 is a high-speed hex D -type flip-flop. The device is used prim arily as a 6-bit edge-triggered storage register. T he inform ation on th e D inputs is transferred to

Contextual Info: PM8393 SMC Preliminary Storage Management Controller PM • SES API for utilizing SES pages and commands over the FC link. • SCSI-3 API for underlying access to the FC Port. • API for downloading firmware over the FC link. • CTS Diagnostic API for FC link access

KSS 240

Abstract: CD4528B CD4528BC CD4528BCM CD4528BCN M16A MS-001 N16E VDO 804 7/11
Contextual Info: O ctober 1987 Revised January 1999 S E M IC O N D U C TO R T M CD4528BC Dual Monostable Multivibrator General Description Features T he C D 4528B is a dual m onostable m ultivibrator. Each device is retriggerable and resettable. Triggering can occur from either th e rising o r falling edge o f an input pulse,

MM74C221

Abstract: 74MMC221N AN-138 MS-001 N16E
Contextual Info: Revised January 1999 S E M I C O N D U C T O R TM MM74C221 Dual Monostable Multivibrator General Description T he MM74C221 dual monostable m ultivibrator is a m ono­ lithic com plem entary M OS integrated circuit. Each m ultivi­ brator features a negative-transition-triggered input and a

74AC109

Abstract: 74AC109PC 74AC109SC 74AC109SJ 74ACT109 M16A M16D
Contextual Info: S H IU D Revised O ctober 1998 74AC109 • 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description LO W input to Cp Clear sets Q to LOW level T h e AC /AC T109 consists of two_ high-speed com pletely independent transition clocked JK flip-flops. The clocking

pic serial programmer schematic diagram

Abstract: PIC32 uart example rs232 programmer schematic ICD2 serial programmer schematic diagram pic programmer schematic pic programmer schematic mplab MOD-SMB380 PIC32MX3 microchip pic32 spi dma example pic serial programming
Contextual Info: PIC-32MX development board Users Manual All boards produced by Olimex are ROHS compliant Rev.A, June 2008 Copyright c 2008, OLIMEX Ltd, All rights reserved INTRODUCTION: The NEW PIC-32MX board uses the new PIC32 32 bit MIPS 4K core processor from Microchip which offers speed and performance at low cost. This board has

64 CERAMIC LEADLESS CHIP CARRIER LCC

Abstract: CERAMIC LEADLESS CHIP CARRIER 54F378DM 74F378 74F378PC 74F378SC 74F378SJ J16A M16A M16D
Contextual Info: S E M IC O N D U C T O R tm 74F378 Parallel D Register with Enable General Description The ’F378 is a 6-blt register with a buffered com m on Enable. This device is sim ilar to the ’F174, but with com m on Enable rather than com m on M aster Reset. • Positive edge-triggered D -type inputs

pic serial programmer schematic diagram

Abstract: pic programmer schematic programmer schematic ICD2 PIC32 uart example rs232 PIC32MX rs232 connection to pic pic programmer schematic mplab microchip pic32 spi dma example MOD-SMB380 serial programmer schematic diagram
Contextual Info: PIC-32MX development board Users Manual All boards produced by Olimex are ROHS compliant Rev.A, June 2008 Copyright c 2008, OLIMEX Ltd, All rights reserved INTRODUCTION: The NEW PIC-32MX board uses the new PIC32 32 bit MIPS 4K core processor from Microchip which offers speed and performance at low cost. This board has