CMOS 16-BIT PRIORITY ENCODER Search Results

MU9C1480-12DC

Abstract: MU9C1480-90DC
Contextual Info: DISTINCTIVE CHARACTERISTICS 1K X 64-bit CMOS Content-addressable Memory CAM 64-bit internal data path multiplexed four ways over a 16-bii I/O interface • Two Mask registers allow masking of individual bits for both writing and comparing • Priority encoder returns highest-priority match address

CD4532BMS

Abstract: IOH15
Contextual Info: CD4532BMS CMOS 8-Bit Priority Encoder December 1992 Features Pinout • High Voltage Type 20V Rating CD4532BMS TOP VIEW • Converts From 1 of 8 to Binary • Provides Cascading Feature to Handle Any Number of Inputs D4 1 16 VDD D5 2 15 E0 • Group Select Indicates One or More Priority Inputs

CD4532BMS

Abstract: IOH15
Contextual Info: CD4532BMS CMOS 8-Bit Priority Encoder December 1992 Features Pinout • High Voltage Type 20V Rating CD4532BMS TOP VIEW • Converts From 1 of 8 to Binary • Provides Cascading Feature to Handle Any Number of Inputs D4 1 16 VDD D5 2 15 E0 • Group Select Indicates One or More Priority Inputs

CD4532BMS

Abstract: IOH15 CD4069BMS
Contextual Info: CD4532BMS S E M I C O N D U C T O R CMOS 8-Bit Priority Encoder December 1992 Features Pinout • High Voltage Type 20V Rating CD4532BMS TOP VIEW • Converts From 1 of 8 to Binary • Provides Cascading Feature to Handle Any Number of Inputs D4 1 16 VDD

cdfp4-f16

Abstract: 5962F9863301V9A 5962F9863301VCC 5962F9863301VXC ACS147DMSR-03 ACS147HMSR-03 ACS147KMSR-03 ACS147MS
Contextual Info: ACS147MS Data Sheet Radiation Hardened 10-to-4 Line Priority Encoder These nine-input priority encoders accept data from nine active LOW inputs and provide a binary representation on the four active LOW outputs. A priority is assigned to each input so that when two or more inputs are simultaneously

Contextual Info: 4532B INTERNATIONAL, INC CMOS 8-BIT PRIORITY ENCODER FEATURES CONNECTION DIAGRAM • Converts from 1 of 8 binary • Provides cascading features to handle any number of inputs • group select indicates one or more priority inputs • Standardized, sym m etrical output characteristics

4532B

Abstract: 4000B CMOS 4000B series device gs1085
Contextual Info: 4532B INTERNATIONAL, INC. CMOS 8-BIT PRIORITY ENCODER FEATURES CONNECTION DIAGRAM v00 E0 GS0302 01 00 00 1 1 1 1 I LI i | 15 14 13 12 11 10 9 • Converts from 1 of 8 binary • Provides cascading features to handle any number of inputs • group select indicates one or more priority inputs

Contextual Info: MC14532B 8-Bit Priority Encoder The MC14532B is constructed with complementary MOS CMOS enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority. Eight data inputs (D0 thru D7) and an enable input

motorola cmos

Abstract: MC14532B MC14071B MC14512 MC14520B MC14XXXBCL MC14XXXBCP MC14XXXBD MC1710 "MOTOROLA CMOS LOGIC DATA"
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14532B 8-Bit Priority Encoder L SUFFIX CERAMIC CASE 620 The MC14532B is constructed with complementary MOS CMOS enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority. Eight

aett1

Abstract: R13 p2f CRC-16 PM9311-UC PM9312-UC PM9313-HC PM9315-HC CRC-16 SIEMENS
Contextual Info: Released PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET Data Sheet PMC-2000164 ISSUE 4 ENHANCED TT1™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet Issue 4: March 2002 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

P09N03

Contextual Info: PRELIMINARY PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET Data Sheet PMC-2000164 ISSUE 1 ENHANCED TT1™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet Preliminary: April 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

76byte

Abstract: 386 chip set f10 60s 6K229 siemens confidential Mechanical Incremental Encoder Type E33 MM 74 HC 221 N siemens k25 624 CCGA DIODE C04 06
Contextual Info: Released PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET Data Sheet PMC-2000164 ISSUE 3 ENHANCED TT1™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet Issue 3: August 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Keyboard Controllers

Abstract: 44-QFP Z86K13 Z86K14 Z86K15 Z86K16 Z86K17 Z86K18
Contextual Info: PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86K13/K14/K15 K16/K17/K18 1 CMOS Z8 8-BIT MCU KEYBOARD CONTROLLERS FEATURES Device ROM KB I/O Lines Speed (MHz) Pin Count/ Package Z86K13 2 32 4-5 Z86K14 3 32 4-5 Z86K15 4 32 4-5 Z86K16 2 32 4-5 Z86K17

Contextual Info: REVISIONS LTR DATE YR-MO-DA APPROVED A Add device type 02. Update boilerplate. -rrp DESCRIPTION 98-09-24 R. MONNIN B Replaced reference to MIL-STD-973 with reference to MIL-PRF-38535. – gt 03-06-04 R. MONNIN C Update boilerplate paragraphs to current MIL-PRF-38535 requirements.

ALI-25T

Abstract: SALI-25C TXC-07225-BCPL nec 07225
Contextual Info: SALI-25C Device Six ATM Line Interface at 25 Mbit/s TXC-07625 DATA SHEET DESCRIPTION FEATURES • Transmission Convergence - meets ATM Forum specifications - maps ATM cells to six 25.6 Mbit/s payloads - NRZI/NRZ and 5B/4B conversions - scrambling, cell delineation and rate adaptation

Contextual Info: ST16C580 -UART with 16-Byte FIFOs and Infrared IrDA Encoder/Decoder HomeNewsCareers Investor Relations Contact Us PartnerNet Login Search CommunicationsInterfacePower Management ST16C580 Support Info Request How to Order Samples How to Buy Print this page

ALI-25T

Abstract: SALI-25C TXC-07225-BCPL 82528 samsung LRA
Contextual Info: SALI-25C Device Six ATM Line Interface at 25 Mbit/s TXC-07625 DATA SHEET FEATURES DESCRIPTION • Transmission Convergence - meets ATM Forum specifications - maps ATM cells to six 25.6 Mbit/s payloads - NRZI/NRZ and 5B/4B conversions - scrambling, cell delineation and rate adaptation

nec 07225

Abstract: LRA-13
Contextual Info: BACK SALI-25C Device Six ATM Line Interface at 25 Mbit/s TXC-07625 DATA SHEET FEATURES DESCRIPTION • Transmission Convergence - meets ATM Forum specifications - maps ATM cells to six 25.6 Mbit/s payloads - NRZI/NRZ and 5B/4B conversions - scrambling, cell delineation and rate adaptation

n8223

Abstract: N-822 CN8223EPF AD6116 78P7200 CN8223 BT8222EPFE PROCESS CONTROL TIMER using 555 ic
Contextual Info: CN8223 ATM Transmitter/Receiver with UTOPIA Interface The CN8223 ATM Transmitter/Receiver with UTOPIA Level 1 interface provides a single-access ATM service termination for User-to-Network UNI and Network-to-Network Interfacing (NNI) in conformance with ATM Forum UNI and NNI

DP-30

Abstract: DP30 Z86K15 Z86U18 9-Port USB hub 10-Port USB hub
Contextual Info: PRELIMINARY PRODUCT SPECIFICATION 1 Z86U18 1 USB DEVICE CONTROLLER WITH CMOS Z86K15 MCU FEATURES Device ROM KB RAM (Bytes) I/O Lines Speed (MHz) Z86U18 4 188 32 6 • Intergrated USB Transceiver @ 1.5 Mb/sec ■ For Use In A Variety of Applications Including Keyboards

MC1710

Abstract: MC14532B MC14512
Contextual Info: MC14532B 8−Bit Priority Encoder The MC14532B is constructed with complementary MOS CMOS enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority. Eight data inputs (D0 thru D7) and an enable input

binary to hex led display decoder

Abstract: 8253 timer ICM7211AMIPL CP82C55A timer 8254 circuit binary to led display decoder HD3-6402R-9 7 Segment common anode encoder HSP45102PC-40 HD3-6409-9
Contextual Info: Intersil Peripherals, Data Communications, Data Converters, and Display Drivers Microprocessor Peripherals 82Cxx 82C54, CMOS Programmable Interval Timer Fully compatible with NMOS 8254, enhanced version of NMOS 8253. Three independent 16 bit counters. Six

Keyboard Controllers

Abstract: dvi to VGA adapter 44-QFP Z86K13 Z86K14 Z86K15 Z86K16 Z86K17 Z86K18 K18 capacitor
Contextual Info: PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86K13/K14/K15 K16/K17/K18 1 CMOS Z8 8-BIT MCU KEYBOARD CONTROLLERS FEATURES Device ROM KB I/O Lines Speed (MHz) Pin Count/ Package Z86K13 2 32 4-5 Z86K14 3 32 4-5 Z86K15 4 32 4-5 Z86K16 2 32 4-5 Z86K17

Contextual Info: tm ä nX-S w it c h „ SALI-25C Device Six ATM Line Interface at 25 Mbit/s TXC-07625 DATA SHEET FEATURES DESCRIPTION • Transmission Convergence - meets ATM Forum specifications - maps ATM cells to six 25.6 Mbit/s payloads - NRZI/NRZ and 5B/4B conversions