CLOCK GENERATOR FOR 4040 Search Results

Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

CDC5806

Abstract: MTSS001C
Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

CDC5806

Abstract: CDC5806PW CDC5806PWR CDC5806PWRG4 MTSS001C
Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

CDC5806

Abstract: CDC5806PW CDC5806PWG4 CDC5806PWR CDC5806PWRG4 MTSS001C
Contextual Info: CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • • • • • • • • • • • High Performance Clock Generator Clock Input Compatible With LVCMOS/LVTTL Requires a 54-MHz Input Clock to Generate

Contextual Info: CDC5806 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS SCAS760A − MARCH 2004 − REVISED MAY 2004 features D High Performance Clock Generator D Clock Input Compatible With D D Max D PLLs are Powered Down, if No Valid D D D REF_IN Clock < 5 MHz) is Detected or the

Contextual Info: CDCE949-Q1 www.ti.com SCAS891 – FEBRUARY 2010 PROGRAMMABLE 4-PLL VCXO CLOCK SYNTHESIZER WITH 1.8-V, 2.5-,V and 3.3-V LVCMOS OUTPUTS Check for Samples: CDCE949-Q1 FEATURES 1 • • • • Qualified for Automotive Applications Member of Programmable Clock Generator

SSC31

Abstract: fs37 SSC3020 CDCE949 CDCE949QPWRQ1 ssc-32 SSC16 ssc24 SSC3120
Contextual Info: CDCE949-Q1 www.ti.com SCAS891 – FEBRUARY 2010 PROGRAMMABLE 4-PLL VCXO CLOCK SYNTHESIZER WITH 1.8-V, 2.5-,V and 3.3-V LVCMOS OUTPUTS Check for Samples: CDCE949-Q1 FEATURES 1 • • • • Qualified for Automotive Applications Member of Programmable Clock Generator

CDC921

Contextual Info: CDCFR83 DIRECT RAMBUS CLOCK GENERATOR SCAS665A – APRIL 2001 REVISED MARCH 2002 D D D D D D D D D D 533-MHz Differential Clock Source for Direct Rambus Memory Systems for an 1066-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System

Contextual Info: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family

CDCE913

Abstract: CDCEL913
Contextual Info: CDCEL913-Q1 www.ti.com SCAS888 – SEPTEMBER 2009 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs Check for Samples: CDCEL913-Q1 FEATURES 1 • • • • • • • Qualified for Automotive Applications Member of Programmable Clock Generator

Contextual Info: CDCEL913-Q1 www.ti.com SCAS888 – SEPTEMBER 2009 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs Check for Samples: CDCEL913-Q1 FEATURES 1 • • • • • • • Qualified for Automotive Applications Member of Programmable Clock Generator

B0137

Contextual Info: CDCD5704 www.ti.com SCAS823 – DECEMBER 2006 Rambus XDR™ CLOCK GENERATOR FEATURES • • • • • • • • • • • • High-Speed Clock Support: 300-MHz–667-MHz Clock Source for XDR Memory Subsystems and Redwood Logic Interface Quad Open-Drain Differential Output Drivers

B0137

Contextual Info: CDCD5704 www.ti.com SCAS823 – DECEMBER 2006 Rambus XDR™ CLOCK GENERATOR FEATURES • • • • • • • • • • • • High-Speed Clock Support: 300-MHz–667-MHz Clock Source for XDR Memory Subsystems and Redwood Logic Interface Quad Open-Drain Differential Output Drivers

Rambus XDR

Abstract: CDCD5704 TSSOP-28 t0132
Contextual Info: CDCD5704 www.ti.com SCAS823 – DECEMBER 2006 Rambus XDR™ CLOCK GENERATOR FEATURES • • • • • • • • • • • • High-Speed Clock Support: 300-MHz–667-MHz Clock Source for XDR Memory Subsystems and Redwood Logic Interface Quad Open-Drain Differential Output Drivers

XDR Rambus

Abstract: CDCD5704 TSSOP-28 B0137
Contextual Info: CDCD5704 www.ti.com SCAS823 – DECEMBER 2006 Rambus XDR™ CLOCK GENERATOR FEATURES • • • • • • • • • • • • High-Speed Clock Support: 300-MHz–667-MHz Clock Source for XDR Memory Subsystems and Redwood Logic Interface Quad Open-Drain Differential Output Drivers

CDCD5704

Abstract: TSSOP-28 t0132 B0137
Contextual Info: CDCD5704 www.ti.com SCAS823 – DECEMBER 2006 Rambus XDR™ CLOCK GENERATOR FEATURES • • • • • • • • • • • • High-Speed Clock Support: 300-MHz–667-MHz Clock Source for XDR Memory Subsystems and Redwood Logic Interface Quad Open-Drain Differential Output Drivers

Contextual Info: CDCE925 CDCEL925 www.ti.com SCAS847F – JULY 2007 – REVISED MARCH 2010 PROGRAMMABLE 2-PLL VCXO CLOCK SYNTHESIZER WITH 1.8-V, 2.5-V and 3.3-V LVCMOS OUTPUTS Check for Samples: CDCE925, CDCEL925 FEATURES • 1 • Member of Programmable Clock Generator Family

Contextual Info: CDCE937 CDCEL937 www.ti.com SLAS564F – AUGUST 2007 – REVISED MARCH 2010 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs Check for Samples: CDCE937, CDCEL937 FEATURES • • 1 • Member of Programmable Clock Generator

Contextual Info: CDCR61A DIRECT RAMBUS CLOCK GENERATOR – LITE SCAS626 – FEBRUARY 2000 D D D D PW PACKAGE TOP VIEW 400-MHz Differential Clock Source for Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Operates From Two (3.3-V and 1.80-V) Power Supplies With 180 mW (Typ) at 400

CDCR61A

Abstract: CDCR61APWR
Contextual Info: CDCR61A DIRECT RAMBUS CLOCK GENERATOR – LITE SCAS626 – FEBRUARY 2000 D D D D PW PACKAGE TOP VIEW 400-MHz Differential Clock Source for Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Operates From Two (3.3-V and 1.80-V) Power Supplies With 180 mW (Typ) at 400

Contextual Info: CDCE913 CDCEL913 www.ti.com SCAS849E – JUNE 2007 – REVISED MARCH 2010 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs Check for Samples: CDCE913, CDCEL913 FEATURES 1 • Member of Programmable Clock Generator Family – CDCE913/CDCEL913: 1-PLL, 3 Outputs