CLOCK GENERATOR 8.448 Search Results

Contextual Info: XR-T5683A Ï S T E X A R .the analog plus company PCM Line Interface Chip TM March 1997-2 FEATURES • Single 5V Supply • Receiver Input Can Be Either Balanced or Unbalanced • Up To 8.448Mbps Operation In Both Tx and Rx Directions • TTL Compatible Interface

Contextual Info: JSf EX4R XR-T5683 PCM Line Interface Chip GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T5683 is a PCM line interface chip. It consists ol both transmit and receive circuitry in a D IL 18 pin package. The maximum bit rate the chip can handle is 8.448 M Bits/s

Contextual Info: XR-T5683 PCM Line Interface Chip G E N E R A L DE SC R IPTIO N PIN A S SIG N M E N T The XR-T5683 is a P C M line interface chip. It consists of both transmit and receive circuitry in a D IL 18 pin package. The maximum bit rate the chip can handle is 8.448 M Bits/s

e2 framer g742

Abstract: HDB3 E2 E2 liu multiplexing e2 frame e3 E2 hdb3 HDB3 to nrz MT90732 MT90732AP G753
Contextual Info: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features ISSUE 1 • Framer for CCITT Recommendations • - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface • - Dual rail or NRZ HDB3 codec for dual rail I/O

e2 framer g742

Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MT90732

8448 clock

Abstract: MT90732 MT90732AP multiplexing e2 frame e3
Contextual Info: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ

Contextual Info: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ

HDB3 E2

Abstract: nrz to hdb3 E2 hdb3 HDB3 to nrz e2 MT90732 MT90732AP g745
Contextual Info: MT90732 CMOS E2/E3 Framer E2/E3F  Advance Information Features • • • • • • • ISSUE 1 Framer for CCITT Recommendations - G.742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) Line side interface - Dual rail or NRZ

G753

Contextual Info: CMOS MT90732 E2/E3 Framer E2/E3F M ITEL Advance Information Features _ ISSUE 1_ May 1995 • Framer for CCITT Recommendations • - G .742 (8448 kbit/s) - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s)

G753

Abstract: g745 E2 hdb3 txc-21037
Contextual Info: E2/E3F Device 8-, 34 Mbit/s Framer TXC-03701 DATA SHEET FEATURES DESCRIPTION The E2/E3 Framer E2/E3F is a CMOS VLSI device that provides the functions needed to frame a wideband payload to one of four CCITT Recommendations: G.742, G.745, G.751, or G.753. The E2/E3F interfaces

g742

Abstract: tsu56
Contextual Info: BACK E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device

G7XX

Abstract: HDB3 E2 txc-21037 G-745 G753 G7421
Contextual Info: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device

Contextual Info: E2/E3F Device 8-, 34-Mbit/s Framer TXC-03701B DATA SHEET FEATURES DESCRIPTION • Framer for ITU-TSS Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) The E2/E3 Framer (E2/E3F) is a CMOS VLSI device

Contextual Info: E2/E3F Device 8-, 34 Mbit/s Framer TXC-03701 v DATA SHEET W FEATURES DESCRIPTION Framer for CCITT Recommendations: - G.742 8448 kbit/s - G.745 (8448 kbit/s) - G.751 (34368 kbit/s) - G.753 (34368 kbit/s) = The E2/E3 Framer (E2/E3F) is a CMOS VLSI device that provides the functions needed to frame a wideband

ic 4043

Abstract: T5683A t5683aid 8 bit 92112 HP3781B E1995 PE65415 PE-65415 XR-T5683A XR-T5683AID
Contextual Info: XR-T5683A .the analog plus PCM Line Interface Chip company TM June 1997-3 FEATURES D TTL Compatible Interface D Single 5V Supply D Device Can Be Used as a Line Interface Unit Without Clock Recovery D Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS

G753

Abstract: 74F32 TXC-02021 TXC-06125 TXC-06125-ACPL TXC06125
Contextual Info: XBERT Device Bit Error Rate Generator Receiver TXC-06125 DATA SHEET FEATURES DESCRIPTION • Bit-serial, nibble-parallel, and byte-parallel interface capability, selectable via control bits The Bit Error Rate Generator/Receiver XBERT VLSI device is a microprocessor-programmable multi-rate

Contextual Info: BACK XBERT Device Bit Error Rate Generator Receiver TXC-06125 DATA SHEET FEATURES DESCRIPTION • Bit-serial, nibble-parallel, and byte-parallel interface capability, selectable via control bits The Bit Error Rate Generator/Receiver XBERT VLSI device is a microprocessor-programmable multi-rate

24444

Abstract: XRT5683AID-F XRT5683AIDf XRT5683AID
Contextual Info: XR-T5683A .the analog plus PCM Line Interface Chip company TM June 1997-3 FEATURES D TTL Compatible Interface D Single 5V Supply D Device Can Be Used as a Line Interface Unit Without Clock Recovery D Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS

Contextual Info: Advance Data Sheet April 2001 TMXF84622 155/622/2488 Mbits/s Interface SONET/SDH x84/x63 Ultra Mapper Features • Versatile IC supports 622/155 Mbits/s SONET/ SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. PDH Interfaces ■

Contextual Info: IgT Integrated Telecom Technology, Inc. E3 Framer EAC-030-A User’s Manual Copyright 1994 -1 9 9 7 Integrated Telecom Technology, Inc. All Rights Reserved Integrated Telecom Technology, Inc. 18310 Montgomery Village Avenue, Suite 300 Gaithersburg, MD 20879 USA

TXC-03361

Abstract: e2 framer g742 TXC-02050 TXC-03701 E3 multiplex demultiplex DS1I
Contextual Info: TranSwitch Corporation 8 Progress Drive Shelton, CT 06484, USA Tel: 203 929-8810 Fax: (203) 926-9453 E-Mail: mktg@txc.com Web Site: http://www.transwitch.com Asynchronous Product Line Note: To access documents related to the VLSI devices and modules listed below, for purposes of

Frame structure for Multiplexing of four E1 streams into E2 stream

Abstract: multiplexing e1 frame to e3 frame SDB6234 E2 liu Frame structure for Multiplexing of four E2 streams into E3 stream e1 E2 e3 liu transceiver hp3784A G742 HP-3784A LXT332
Contextual Info: Designing an ITU G.742 Compliant PDH Multiplexer with the LXT332 Dual Transceiver Application Note January 2001 Order Number: 249164-001 As of January 15, 2001, this document replaces the Level One document known as AN056. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: XR-T5683A .the analog plus company PCM Line Interface Chip TM June 1997-3 FEATURES TTL Compatible Interface Device Can Be Used as a Line Interface Unit With­ out Clock Recovery Single 5V Supply Receiver Input Can Be Either Balanced or Unbalanced APPLICATIONS

ITU-T G964

Abstract: GR253-CORE JT-G704 JT-G706 JTG707 TMXF84622 TR-62411 700-Pin
Contextual Info: Advance Data Sheet, Rev. 2 July 2001 TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper 1 Features • Versatile IC supports 622 Mbits/s/155 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications.